Re: [PATCH 1/1] cmd/exception: test RISC-V 16 bit aligned instruction

On Thu, Sep 21, 2023 at 12:39:29PM +0200, Heinrich Schuchardt wrote: > A 16 bit aligned instruction should generated an exception if the C > extension is not available. > > Provide an 'extension ialign16' command for testing exception handling. > > For testing build qemu-riscv64_defconfig with

[PATCH 1/1] cmd/exception: test RISC-V 16 bit aligned instruction

A 16 bit aligned instruction should generated an exception if the C extension is not available. Provide an 'extension ialign16' command for testing exception handling. For testing build qemu-riscv64_defconfig with CONFIG_RISCV_ISA_C=n and run with qemu-system-riscv64 -M virt -bios u-boot