Re: [PATCH 1/2] sunxi: support asymmetric dual rank DRAM on A64/R40

2021-03-18 Thread Peter Robinson
On Thu, Feb 25, 2021 at 4:14 PM Icenowy Zheng wrote: > > Previously we have known that R40 has a configuration register for its > rank 1, which allows different configuration than rank 0. Reverse > engineering of newest libdram of A64 from Allwinner shows that A64 has > this register too. It's

Re: [PATCH 1/2] sunxi: support asymmetric dual rank DRAM on A64/R40

2021-03-17 Thread Andre Przywara
On Fri, 26 Feb 2021 00:13:24 +0800 Icenowy Zheng wrote: > Previously we have known that R40 has a configuration register for its > rank 1, which allows different configuration than rank 0. Reverse > engineering of newest libdram of A64 from Allwinner shows that A64 has > this register too. It's

[PATCH 1/2] sunxi: support asymmetric dual rank DRAM on A64/R40

2021-02-25 Thread Icenowy Zheng
Previously we have known that R40 has a configuration register for its rank 1, which allows different configuration than rank 0. Reverse engineering of newest libdram of A64 from Allwinner shows that A64 has this register too. It's bit 0 (which enables dual rank in rank 0 configuration register)