On 9/13/22 20:23, Yann Gautier wrote:
> To support dual data rate with STM32 sdmmc2 driver, the dedicated bit
> (DDR - BIT(18)) needs to be set in the CLKRC register. Clock bypass
> (no divider) is not allowed in this case. This is required for the
> eMMC DDR modes.
>
> Signed-off-by: Yann
On 9/13/22 20:23, Yann Gautier wrote:
> To support dual data rate with STM32 sdmmc2 driver, the dedicated bit
> (DDR - BIT(18)) needs to be set in the CLKRC register. Clock bypass
> (no divider) is not allowed in this case. This is required for the
> eMMC DDR modes.
>
> Signed-off-by: Yann
To support dual data rate with STM32 sdmmc2 driver, the dedicated bit
(DDR - BIT(18)) needs to be set in the CLKRC register. Clock bypass
(no divider) is not allowed in this case. This is required for the
eMMC DDR modes.
Signed-off-by: Yann Gautier
---
drivers/mmc/stm32_sdmmc2.c | 5 -
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