Re: [PATCH 1/3] mmc: stm32_sdmmc2: add dual data rate support

2022-10-24 Thread Jaehoon Chung
On 9/13/22 20:23, Yann Gautier wrote: > To support dual data rate with STM32 sdmmc2 driver, the dedicated bit > (DDR - BIT(18)) needs to be set in the CLKRC register. Clock bypass > (no divider) is not allowed in this case. This is required for the > eMMC DDR modes. > > Signed-off-by: Yann

Re: [PATCH 1/3] mmc: stm32_sdmmc2: add dual data rate support

2022-10-07 Thread Jaehoon Chung
On 9/13/22 20:23, Yann Gautier wrote: > To support dual data rate with STM32 sdmmc2 driver, the dedicated bit > (DDR - BIT(18)) needs to be set in the CLKRC register. Clock bypass > (no divider) is not allowed in this case. This is required for the > eMMC DDR modes. > > Signed-off-by: Yann

[PATCH 1/3] mmc: stm32_sdmmc2: add dual data rate support

2022-09-13 Thread Yann Gautier
To support dual data rate with STM32 sdmmc2 driver, the dedicated bit (DDR - BIT(18)) needs to be set in the CLKRC register. Clock bypass (no divider) is not allowed in this case. This is required for the eMMC DDR modes. Signed-off-by: Yann Gautier --- drivers/mmc/stm32_sdmmc2.c | 5 - 1