Hi Andre,
On 7/18/22 11:20 AM, Andre Przywara wrote:
> P.S.: I see that the A83T kernel pinctrl driver uses "nand" for *some* pins
> instead of "nand0", not sure if that should to be fixed, or if it's too
> late for that (not that NAND is mentioned at all in the A83T DT files ...)
I already sent
Hi Andre
On Mon, Jul 18, 2022 at 6:20 PM Andre Przywara wrote:
>
> On Wed, 13 Jul 2022 22:15:22 -0500
> Samuel Holland wrote:
>
> Hi,
>
> > NAND is always at function 2 on port C.
>
> Indeed.
>
> >
> > Pin lists and mux values were taken from the Linux drivers.
>
> Compared against the manuals.
On Wed, 13 Jul 2022 22:15:22 -0500
Samuel Holland wrote:
Hi,
> NAND is always at function 2 on port C.
Indeed.
>
> Pin lists and mux values were taken from the Linux drivers.
Compared against the manuals. I didn't bother the check the pin ranges (I
think some additional CS pins were not
On Thu, Jul 14, 2022 at 8:45 AM Samuel Holland wrote:
>
> NAND is always at function 2 on port C.
>
> Pin lists and mux values were taken from the Linux drivers.
>
> Signed-off-by: Samuel Holland
> ---
Reviewed-by: Jagan Teki
NAND is always at function 2 on port C.
Pin lists and mux values were taken from the Linux drivers.
Signed-off-by: Samuel Holland
---
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
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