Vasut
>>>> Sent: vendredi 3 avril 2020 23:31
>>>> To: Patrick DELAUNAY ; u-boot@lists.denx.de
>>>> Cc: Simon Glass ; Alexey Brodkin
>>>> ; Lokesh Vutla ; Tom Rini
>>>> ; Trevor Woerner ; U-Boot
>>>> STM32
>>>>
Patrick DELAUNAY ; u-boot@lists.denx.de
> >> Cc: Simon Glass ; Alexey Brodkin
> >> ; Lokesh Vutla ; Tom Rini
> >> ; Trevor Woerner ; U-Boot
> >> STM32
> >> Subject: Re: [PATCH 3/3] arm: caches: manage phys_addr_t overflow in
> >> mmu_set_region_d
om Rini
>> ; Trevor Woerner ; U-Boot STM32
>>
>> Subject: Re: [PATCH 3/3] arm: caches: manage phys_addr_t overflow in
>> mmu_set_region_dcache_behaviour
>> Importance: High
>>
>> On 4/3/20 10:28 AM, Patrick Delaunay wrote:
>>> Detect and solve the ov
> -Original Message-
> From: Marek Vasut
> Sent: vendredi 3 avril 2020 23:31
> To: Patrick DELAUNAY ; u-boot@lists.denx.de
> Cc: Simon Glass ; Alexey Brodkin
> ; Lokesh Vutla ; Tom Rini
> ; Trevor Woerner ; U-Boot STM32
>
> Subject: Re: [PATCH 3/3] arm:
On 4/3/20 10:28 AM, Patrick Delaunay wrote:
> Detect and solve the overflow on phys_addr_t type for start + size in
> mmu_set_region_dcache_behaviour() function.
>
> This issue occurs for example with ARM32, start = 0xC000 and
> size = 0x4000: start + size = 0x1 and end = 0x0.
>
Detect and solve the overflow on phys_addr_t type for start + size in
mmu_set_region_dcache_behaviour() function.
This issue occurs for example with ARM32, start = 0xC000 and
size = 0x4000: start + size = 0x1 and end = 0x0.
Overflow is detected when end < start.
In normal case
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