[PATCH 4/5] arm: dts: imx8mm-venice-gw71xx: add TPM device

[Tim Harvey]

Add the TPM device found on the GW71xx revision E PCB.

This hangs off of SPI2, uses gpio1_10 as a CS and gpio1_11 as RST#.

Signed-off-by: Tim Harvey <thar...@gateworks.com>
---
 arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi |  7 +++++++
 arch/arm/dts/imx8mm-venice-gw71xx.dtsi           | 11 +++++++++--
 2 files changed, 16 insertions(+), 2 deletions(-)

diff --git a/arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi 
b/arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi
index b3592331c72b..07789c8d8835 100644
--- a/arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-venice-gw71xx-0x-u-boot.dtsi
@@ -25,6 +25,13 @@
                gpios = <9 GPIO_ACTIVE_HIGH>;
                line-name = "dio1";
        };
+
+       tpm_rst {
+               gpio-hog;
+               output-high;
+               gpios = <11 GPIO_ACTIVE_HIGH>;
+               line-name = "tpm_rst#";
+       };
 };
 
 &gpio4 {
diff --git a/arch/arm/dts/imx8mm-venice-gw71xx.dtsi 
b/arch/arm/dts/imx8mm-venice-gw71xx.dtsi
index 2e90466db89a..ff8b367b3ab2 100644
--- a/arch/arm/dts/imx8mm-venice-gw71xx.dtsi
+++ b/arch/arm/dts/imx8mm-venice-gw71xx.dtsi
@@ -49,12 +49,18 @@
        };
 };
 
-/* off-board header */
 &ecspi2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_spi2>;
-       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
+                  <&gpio1 10 GPIO_ACTIVE_LOW>;
        status = "okay";
+
+       tpm@1 {
+               compatible = "tcg,tpm_tis-spi";
+               reg = <0x1>;
+               spi-max-frequency = <36000000>;
+       };
 };
 
 &gpio1 {
@@ -202,6 +208,7 @@
                        MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI    0xd6
                        MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO    0xd6
                        MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13      0xd6
+                       MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10      0xd6
                >;
        };
 
-- 
2.25.1