Re: [PATCH 4/5] riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bit

On Fri, Jun 04, 2021 at 01:51:12PM +0800, Bin Meng wrote: > All the device nodes that refer to plic0 as their interrupt parent > have 2 cells encoded in their interrupts property, but plic0 only > provides 1 cell in #interrupt-cells which is incorrect. > > Signed-off-by: Bin Meng > --- > >

Re: [PATCH 4/5] riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bit

> From: Bin Meng > Sent: Friday, June 04, 2021 1:51 PM > To: Rick Jian-Zhi Chen(陳建志) ; Leo Yu-Chi Liang(梁育齊) > ; U-Boot Mailing List > Subject: [PATCH 4/5] riscv: ae350: dts: Fix #interrupt-cells for plic0 in > 32-bit > > All the device nodes that refer to plic0 as the

[PATCH 4/5] riscv: ae350: dts: Fix #interrupt-cells for plic0 in 32-bit

All the device nodes that refer to plic0 as their interrupt parent have 2 cells encoded in their interrupts property, but plic0 only provides 1 cell in #interrupt-cells which is incorrect. Signed-off-by: Bin Meng --- arch/riscv/dts/ae350_32.dts | 2 +- 1 file changed, 1 insertion(+), 1