LS1046A SoC serdes protocol 0x3040 supports both sgmi and qsgmii,
however frwy-ls1046a supports only QSGMI on board.
Disable unsupported sgmii on bord.

Signed-off-by: Pramod Kumar <pramod.kuma...@nxp.com>
---
 arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c | 56 +++++++++++++++++++---
 1 file changed, 50 insertions(+), 6 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c 
b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
index 9347e51..e5b2269 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1046a_serdes.c
@@ -38,6 +38,31 @@ static struct serdes_config serdes1_cfg_tbl[] = {
        {}
 };
 
+static struct serdes_config serdes1_cfg_tbl_frwy_ls1046a[] = {
+       /* SerDes 1 */
+       {0x3333, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
+                 SGMII_FM1_DTSEC6} },
+       {0x1133, {XFI_FM1_MAC9, XFI_FM1_MAC10, SGMII_FM1_DTSEC5,
+                 SGMII_FM1_DTSEC6} },
+       {0x1333, {XFI_FM1_MAC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
+                 SGMII_FM1_DTSEC6} },
+       {0x2333, {SGMII_2500_FM1_DTSEC9, SGMII_FM1_DTSEC10, SGMII_FM1_DTSEC5,
+                 SGMII_FM1_DTSEC6} },
+       {0x2233, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10,
+                 SGMII_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
+       {0x1040, {XFI_FM1_MAC9, NONE, QSGMII_FM1_A, NONE} },
+       {0x2040, {SGMII_2500_FM1_DTSEC9, NONE, QSGMII_FM1_A, NONE} },
+       {0x1163, {XFI_FM1_MAC9, XFI_FM1_MAC10, PCIE1, SGMII_FM1_DTSEC6} },
+       {0x2263, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10, PCIE1,
+                 SGMII_FM1_DTSEC6} },
+       {0x3363, {SGMII_FM1_DTSEC9, SGMII_FM1_DTSEC10, PCIE1,
+                 SGMII_FM1_DTSEC6} },
+       {0x2223, {SGMII_2500_FM1_DTSEC9, SGMII_2500_FM1_DTSEC10,
+                 SGMII_2500_FM1_DTSEC5, SGMII_FM1_DTSEC6} },
+       {0x3040, {NONE, NONE, QSGMII_FM1_A, NONE} },
+       {}
+};
+
 static struct serdes_config serdes2_cfg_tbl[] = {
        /* SerDes 2 */
        {0x8888, {PCIE1, PCIE1, PCIE1, PCIE1} },
@@ -56,14 +81,26 @@ static struct serdes_config *serdes_cfg_tbl[] = {
        serdes2_cfg_tbl,
 };
 
+static struct serdes_config *serdes_cfg_tbl_frwy_ls1046a[] = {
+       serdes1_cfg_tbl_frwy_ls1046a,
+       serdes2_cfg_tbl,
+};
+
 enum srds_prtcl serdes_get_prtcl(int serdes, int cfg, int lane)
 {
        struct serdes_config *ptr;
+       char *board_type = CONFIG_SYS_BOARD;
 
-       if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
-               return 0;
+       if (!strncmp(board_type, "ls1046afrwy", strlen("ls1046afrwy"))) {
+               if (serdes >= ARRAY_SIZE(serdes_cfg_tbl_frwy_ls1046a))
+                       return 0;
+               ptr = serdes_cfg_tbl_frwy_ls1046a[serdes];
+       } else {
+               if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
+                       return 0;
+               ptr = serdes_cfg_tbl[serdes];
+       }
 
-       ptr = serdes_cfg_tbl[serdes];
        while (ptr->protocol) {
                if (ptr->protocol == cfg)
                        return ptr->lanes[lane];
@@ -77,11 +114,18 @@ int is_serdes_prtcl_valid(int serdes, u32 prtcl)
 {
        int i;
        struct serdes_config *ptr;
+       char *board_type = CONFIG_SYS_BOARD;
 
-       if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
-               return 0;
+       if (!strncmp(board_type, "ls1046afrwy", strlen("ls1046afrwy"))) {
+               if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
+                       return 0;
+               ptr = serdes_cfg_tbl_frwy_ls1046a[serdes];
+       } else {
+               if (serdes >= ARRAY_SIZE(serdes_cfg_tbl))
+                       return 0;
+               ptr = serdes_cfg_tbl[serdes];
+       }
 
-       ptr = serdes_cfg_tbl[serdes];
        while (ptr->protocol) {
                if (ptr->protocol == prtcl)
                        break;
-- 
2.7.4

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