Re: [PATCH v2] pinctrl: rockchip: Add pinctrl support for rk3308

2019-12-05 Thread Kever Yang
On 2019/12/3 下午7:26, David Wu wrote: An iomux register contains 8 pins, each of which is represented by 2 bits, but the register offset is 0x8. For example, GRF_GPIO0A_IOMUX offset is 0x0, but GRF_GPIO0B_IOMUX offset is 0x8, the offset 0x4 is reserved. So add a type IOMUX_8WIDTH_2BIT to calcu

[U-Boot] [PATCH v2] pinctrl: rockchip: Add pinctrl support for rk3308

2019-12-03 Thread David Wu
An iomux register contains 8 pins, each of which is represented by 2 bits, but the register offset is 0x8. For example, GRF_GPIO0A_IOMUX offset is 0x0, but GRF_GPIO0B_IOMUX offset is 0x8, the offset 0x4 is reserved. So add a type IOMUX_8WIDTH_2BIT to calculate offset. Signed-off-by: David Wu --