Re: [PATCH v4 3/6] riscv: Provide a mechanism to fix DT for reserved memory

On Mon, Mar 23, 2020 at 11:14 PM Heinrich Schuchardt wrote: > > On 3/24/20 5:16 AM, Atish Patra wrote: > > In RISC-V, M-mode software can reserve physical memory regions > > by setting appropriate physical memory protection (PMP) csr. As the > > PMP csr are accessible only in M-mode, S-mode

Re: [PATCH v4 3/6] riscv: Provide a mechanism to fix DT for reserved memory

On 3/24/20 5:16 AM, Atish Patra wrote: In RISC-V, M-mode software can reserve physical memory regions by setting appropriate physical memory protection (PMP) csr. As the PMP csr are accessible only in M-mode, S-mode U-Boot can not read this configuration directly. However, M-mode software can

[PATCH v4 3/6] riscv: Provide a mechanism to fix DT for reserved memory

In RISC-V, M-mode software can reserve physical memory regions by setting appropriate physical memory protection (PMP) csr. As the PMP csr are accessible only in M-mode, S-mode U-Boot can not read this configuration directly. However, M-mode software can pass this information via reserved-memory