RE: [PATCH v4 4/4] riscv: cpu: check and append L1 cache to cpu features

ct: Re: [PATCH v4 4/4] riscv: cpu: check and append L1 cache to cpu > features > > [External Email] Do not click links or attachments unless you recognize the > sender and know the content is safe > > On Sun, Jun 21, 2020 at 9:10 PM Sagar Shrikant Kadam > wrote: > >

Re: [PATCH v4 4/4] riscv: cpu: check and append L1 cache to cpu features

On Sun, Jun 21, 2020 at 9:10 PM Sagar Shrikant Kadam wrote: > > All cpu cores within FU540-C000 having split I/D caches. > Set the L1 cache feature bit using the i-cache-size as one of the > property from device tree indicating that L1 cache is present > on the cpu core. > > => cpu detail > 0:

[PATCH v4 4/4] riscv: cpu: check and append L1 cache to cpu features

All cpu cores within FU540-C000 having split I/D caches. Set the L1 cache feature bit using the i-cache-size as one of the property from device tree indicating that L1 cache is present on the cpu core. => cpu detail 0: cpu@0 rv64imac ID = 0, freq = 999.100 MHz: L1 cache 1: cpu@1