Hi Wolfgang, Hi Semih,
On Tuesday 23 March 2010 21:01:12 Wolfgang Denk wrote:
It's not possible to simply disable caching for 0x0 region. It can be
achieved using paging, but it's more complicated.
I have three specific questions:
* Is it technically possible to set up the AVR32 memory
On 3/22/10 11:23 AM, Stefan Roese wrote:
Currently I see 2 approaches to support NOR FLASH mapped via a cached memory
region in the common CFI driver:
a) Use write-through cache support (if possible) and add required cache
handling calls (invalidate and flush) at the correct locations
Dear Semih Hazar,
In message 4ba8fd4e.9080...@indefia.com you wrote:
I'm not the expert on the AVR32 memory architecture, but as far as I
know it goes like this for the NOR Flash area:
The Flash is mapped at the physical address at 0x0 and this region is
cached.
This same memory region is
Hi Wolfgang,
On Sunday 21 March 2010 17:34:50 Wolfgang Denk wrote:
The problem with AVR32 and the CFI flash driver has a few possible
solutions as noted by Haavard Skinnemoen in the email [1]. The only
thing I can do is to go with the first alternative and set the flash
address as the
Dear Semih Hazar,
In message 4b6b004c.1010...@indefia.com you wrote:
The problem with AVR32 and the CFI flash driver has a few possible
solutions as noted by Haavard Skinnemoen in the email [1]. The only
thing I can do is to go with the first alternative and set the flash
address as the
Dear Semih Hazar,
In message 4b8bcb49.4000...@indefia.com you wrote:
It's been a while over this issue, so I wanted to ask. Did you have time
to look at this?
I looked at it now. Please see my previous message.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD:
Dear Semih Hazar,
In message 4b6b0058.2090...@indefia.com you wrote:
Nimbus Cloud is an AVR32 based single board computer with
256MiB NAND, 64MiB SDRAM, battery backed RTC, LCD/touch
screen support, VGA Output, Ethernet and offers seamless
integration with Indefia's Zigbee transceivers.
On 2/4/10 7:13 PM, Semih Hazar wrote:
Please find the revised patch in a separate email, which also includes a
new header file per your comments in the other email.
Dear Wolfgang,
It's been a while over this issue, so I wanted to ask. Did you have time
to look at this?
Regards,
Semih
Nimbus Cloud is an AVR32 based single board computer with
256MiB NAND, 64MiB SDRAM, battery backed RTC, LCD/touch
screen support, VGA Output, Ethernet and offers seamless
integration with Indefia's Zigbee transceivers.
---
CREDITS |4 +
MAINTAINERS
Dear Semih Hazar,
In message 4b5852ff.5080...@indefia.com you wrote:
Is ther e a chance to do without this file and use the CFI driver
instead?
There's currently a problem with the CFI driver in AVR32 platform. There
was a long discussion about it, but a solution was not available.
Dear Semih Hazar,
In message 4b585314.7010...@indefia.com you wrote:
Nimbus Cloud is an AVR32 based single board computer with
256MiB NAND, 64MiB SDRAM, battery backed RTC, LCD/touch
screen support, VGA Output, Ethernet and offers seamless
integration with Indefia's Zigbee transceivers.
Dear Wolfgang,
Please find my answers below.
Is ther e a chance to do without this file and use the CFI driver
instead?
There's currently a problem with the CFI driver in AVR32 platform. There
was a long discussion about it, but a solution was not available. If
that issue is solved, I can
Dear Semih Hazar,
In message 4b2a2e3a.4070...@indefia.com you wrote:
Nimbus Cloud is an AVR32 based single board computer with
256MiB NAND, 64MiB SDRAM, battery backed RTC, LCD/touch
screen support, VGA Output, Ethernet and offers seamless
integration with Indefia's Zigbee transceivers.
...
Hi,
I had sent a few patches almost a month ago about a new AVR32 board, but
couldn't get a reply from anyone.
I'd appreciate if we can get these patches into the upcoming release.
Regards,
Semih Hazar
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Nimbus Cloud is an AVR32 based single board computer with
256MiB NAND, 64MiB SDRAM, battery backed RTC, LCD/touch
screen support, VGA Output, Ethernet and offers seamless
integration with Indefia's Zigbee transceivers.
---
CREDITS |4 +
MAINTAINERS
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