Re: [U-Boot] [PATCH] NAND: davinci: choose correct 1-bit h/w ECC reg

2011-09-29 Thread Laurence Withers
On Wed, Sep 28, 2011 at 12:58:45PM +0400, Sergei Shtylyov wrote: You need to sign off your patch. Add this line to the changelog: Signed-off-by: Laurence Withers lwith...@guralp.com Thanks, I have reposted v2. Please ignore the posting with the unaltered subject line; I only realised after

[U-Boot] [PATCH] NAND: davinci: choose correct 1-bit h/w ECC reg

2011-09-29 Thread Laurence Withers
In nand_davinci_readecc(), select the correct NANDFnECC register based on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC. This allows 1-bit hardware ECC to work with chip select other than CS2. Note this now matches the usage in nand_davinci_enable_hwecc(), which already had

Re: [U-Boot] [PATCH] NAND: davinci: choose correct 1-bit h/w ECC reg

2011-09-28 Thread Sergei Shtylyov
Hello. On 26-09-2011 20:02, Laurence Withers wrote: In nand_davinci_readecc(), select the correct NANDFnECC register based on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC. This allows 1-bit hardware ECC to work with chip select other than CS2. Note this now matches the

[U-Boot] [PATCH] NAND: davinci: choose correct 1-bit h/w ECC reg

2011-09-27 Thread Laurence Withers
In nand_davinci_readecc(), select the correct NANDFnECC register based on CONFIG_SYS_NAND_CS rather than hardcoding the choice of NANDF1ECC. This allows 1-bit hardware ECC to work with chip select other than CS2. Note this now matches the usage in nand_davinci_enable_hwecc(), which already had