On 07/21/2015 05:28 PM, Tom Rini wrote:
On Wed, Jul 08, 2015 at 11:51:39AM -0400, Vitaly Andrianov wrote:
Keystone2 SOC physical DDR3 address range is outside the first 4GB and
cannot be entirely accessible without MMU enabled. Only first 2GB of
the physical memory have 32-bits aliased
On Wed, Jul 08, 2015 at 11:51:39AM -0400, Vitaly Andrianov wrote:
Keystone2 SOC physical DDR3 address range is outside the first 4GB and
cannot be entirely accessible without MMU enabled. Only first 2GB of
the physical memory have 32-bits aliased addresses. This patch adds u-boot
shell
Keystone2 SOC physical DDR3 address range is outside the first 4GB and
cannot be entirely accessible without MMU enabled. Only first 2GB of
the physical memory have 32-bits aliased addresses. This patch adds u-boot
shell command that allows to enable/disable MMU and map the 1GB of
36bits physical
3 matches
Mail list logo
