Hi Benoît,
On 15/01/2018 22:11, Benoît Thébaudeau wrote:
> Hi Stefano,
>
> On Mon, Jan 15, 2018 at 11:59 AM, Stefano Babic wrote:
>> On 15/01/2018 00:46, Benoît Thébaudeau wrote:
>>> + int pre_div = regs == (struct fsl_esdhc *)MMC_SDHC3_BASE_ADDR ? 2 : 1;
>>
>> It is surely
Hi Stefano,
On Mon, Jan 15, 2018 at 11:59 AM, Stefano Babic wrote:
> On 15/01/2018 00:46, Benoît Thébaudeau wrote:
>> + int pre_div = regs == (struct fsl_esdhc *)MMC_SDHC3_BASE_ADDR ? 2 : 1;
>
> It is surely a question of taste - but is it not cleared to surround the
>
Hi Benoît,
On 15/01/2018 00:46, Benoît Thébaudeau wrote:
> Commit 4f425280fa71 ("mmc: fsl_esdhc: Allow all supported prescaler
> values") made it possible to set SYSCTL.SDCLKFS to 0 in SDR mode on
> i.MX, thus bypassing the SD clock frequency prescaler, in order to be
> able to get higher SD
+ Adding Jaehoon, who is the U-Boot MMC maintainer.
On Sun, Jan 14, 2018 at 9:46 PM, Benoît Thébaudeau
wrote:
> Commit 4f425280fa71 ("mmc: fsl_esdhc: Allow all supported prescaler
> values") made it possible to set SYSCTL.SDCLKFS to 0 in SDR mode on
> i.MX, thus
Commit 4f425280fa71 ("mmc: fsl_esdhc: Allow all supported prescaler
values") made it possible to set SYSCTL.SDCLKFS to 0 in SDR mode on
i.MX, thus bypassing the SD clock frequency prescaler, in order to be
able to get higher SD clock frequencies in some contexts. However, that
commit missed the
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