Hi,
On 07/12/2018 06:14, Kevin Hilman wrote:
> Carlo Caione writes:
>
>> The pin number (first and last) in the bank definition is missing the
>> pin base offset shifting. This is causing a miscalculation when
>> retrieving the register and pin offsets in the GPIO driver causing the
>> 'gpio' co
Carlo Caione writes:
> The pin number (first and last) in the bank definition is missing the
> pin base offset shifting. This is causing a miscalculation when
> retrieving the register and pin offsets in the GPIO driver causing the
> 'gpio' command to drive the wrong pins / GPIOs in the second GP
The pin number (first and last) in the bank definition is missing the
pin base offset shifting. This is causing a miscalculation when
retrieving the register and pin offsets in the GPIO driver causing the
'gpio' command to drive the wrong pins / GPIOs in the second GPIO chip
(the AO bank is driven
3 matches
Mail list logo