Dear Stefan Roese,
In message <[EMAIL PROTECTED]> you wrote:
> From: Yuri Tikhonov <[EMAIL PROTECTED]>
>
> Set the MQ Read Passing & MCIF Cycle limits to the recommended by AMCC
> values. This fixes the occasional 440SPe hard locking issues when the 440SPe's
> dedicated DMA engines are used (e.g.
From: Yuri Tikhonov <[EMAIL PROTECTED]>
Set the MQ Read Passing & MCIF Cycle limits to the recommended by AMCC
values. This fixes the occasional 440SPe hard locking issues when the 440SPe's
dedicated DMA engines are used (e.g. by the h/w accelerated RAID driver).
Previously the appropriate initia
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