On Fri, 2014-02-14 at 03:21 +0800, Stefan Agner wrote:
On Tegra 3, the PTS (parallel transceiver select) and STS (serial
transceiver select) are part of the HOSTPC1_DEVLC_0 register rather
than PORTSC1_0 register. Since the reset configuration usually
matches the configured registers, this
On Tegra 3, the PTS (parallel transceiver select) and STS (serial
transceiver select) are part of the HOSTPC1_DEVLC_0 register rather
than PORTSC1_0 register. Since the reset configuration usually
matches the configured registers, this error did not show up on
Tegra 3 devices.
Also clear the
Adding Jim Lin (NV USB expert) to the review
-Original Message-
From: Stefan Agner [mailto:ste...@agner.ch]
Sent: Thursday, February 13, 2014 12:21 PM
To: u-boot@lists.denx.de; swar...@wwwdotorg.org; Tom Warren;
s...@chromium.org; d...@lynxeye.de
Cc: ste...@agner.ch
Subject:
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