On Dec 2, 2008, at 4:36 PM, Kumar Gala wrote:
>
> On Dec 2, 2008, at 2:29 PM, Jon Loeliger wrote:
>
>> On Tue, 2008-12-02 at 14:19 -0600, Kumar Gala wrote:
>>> Added a PIXIS_BASE_PHYS for use as the physical address and maintain
>>> PIXIS_BASE as the virtual address of the PIXIS fpga registers.
>
On Dec 2, 2008, at 2:29 PM, Jon Loeliger wrote:
> On Tue, 2008-12-02 at 14:19 -0600, Kumar Gala wrote:
>> Added a PIXIS_BASE_PHYS for use as the physical address and maintain
>> PIXIS_BASE as the virtual address of the PIXIS fpga registers.
>>
>> This allows us to deal with 36-bit phys on these b
On Tue, 2008-12-02 at 14:19 -0600, Kumar Gala wrote:
> Added a PIXIS_BASE_PHYS for use as the physical address and maintain
> PIXIS_BASE as the virtual address of the PIXIS fpga registers.
>
> This allows us to deal with 36-bit phys on these boards in the future.
>
> Signed-off-by: Kumar Gala <[E
Added a PIXIS_BASE_PHYS for use as the physical address and maintain
PIXIS_BASE as the virtual address of the PIXIS fpga registers.
This allows us to deal with 36-bit phys on these boards in the future.
Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---
These require the 'FSL: Moved BR_PHYS_ADDR
4 matches
Mail list logo
