Re: [U-Boot] [PATCH 1/4] arm/ls102xa: create TLB to map PCIe region

2015-02-25 Thread York Sun
On 01/21/2015 01:29 AM, Minghuan Lian wrote: LS1021A's PCIe1 region begins 0x40_; PCIe2 begins 0x48_. In order to access PCIe device, we must create TLB to map the 40bit physical address to 32bit virtual address. This patch will enable MMU after DDR is available and creates

[U-Boot] [PATCH 1/4] arm/ls102xa: create TLB to map PCIe region

2015-01-21 Thread Minghuan Lian
LS1021A's PCIe1 region begins 0x40_; PCIe2 begins 0x48_. In order to access PCIe device, we must create TLB to map the 40bit physical address to 32bit virtual address. This patch will enable MMU after DDR is available and creates MMU table in DRAM to map all 4G space; then, re-use