On Tue, Mar 21, 2017 at 7:13 AM, Rick Altherr wrote:
> +Joel
>
> On Mon, Mar 20, 2017 at 10:52 AM, Maxim Sloyko wrote:
>> On Mon, Mar 20, 2017 at 10:30 AM, Tom Rini wrote:
>>> So this applies to a lot of parts of the series here. What
On Mon, Mar 20, 2017 at 12:48 PM, Tom Rini wrote:
>
> On Mon, Mar 20, 2017 at 10:52:12AM -0700, Maxim Sloyko wrote:
> > On Mon, Mar 20, 2017 at 10:30 AM, Tom Rini wrote:
> >
> > > On Mon, Mar 20, 2017 at 10:24:20AM -0700, Maxim Sloyko wrote:
> > > > On
+Joel
On Mon, Mar 20, 2017 at 10:52 AM, Maxim Sloyko wrote:
>
>
> On Mon, Mar 20, 2017 at 10:30 AM, Tom Rini wrote:
>>
>> On Mon, Mar 20, 2017 at 10:24:20AM -0700, Maxim Sloyko wrote:
>> > On Sun, Mar 19, 2017 at 9:42 AM, Tom Rini
On Mon, Mar 20, 2017 at 10:52:12AM -0700, Maxim Sloyko wrote:
> On Mon, Mar 20, 2017 at 10:30 AM, Tom Rini wrote:
>
> > On Mon, Mar 20, 2017 at 10:24:20AM -0700, Maxim Sloyko wrote:
> > > On Sun, Mar 19, 2017 at 9:42 AM, Tom Rini wrote:
> > >
> > > > On
On Mon, Mar 20, 2017 at 10:30 AM, Tom Rini wrote:
> On Mon, Mar 20, 2017 at 10:24:20AM -0700, Maxim Sloyko wrote:
> > On Sun, Mar 19, 2017 at 9:42 AM, Tom Rini wrote:
> >
> > > On Thu, Mar 16, 2017 at 02:36:20PM -0700, Maxim Sloyko wrote:
> > > > Add
On Mon, Mar 20, 2017 at 10:24:20AM -0700, Maxim Sloyko wrote:
> On Sun, Mar 19, 2017 at 9:42 AM, Tom Rini wrote:
>
> > On Thu, Mar 16, 2017 at 02:36:20PM -0700, Maxim Sloyko wrote:
> > > Add support for clocks needed by MACs to ast2500 clock driver.
> > > The clocks are
On Sun, Mar 19, 2017 at 9:42 AM, Tom Rini wrote:
> On Thu, Mar 16, 2017 at 02:36:20PM -0700, Maxim Sloyko wrote:
> > Add support for clocks needed by MACs to ast2500 clock driver.
> > The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
> > PCLK_MAC2 for MAC1
On Thu, Mar 16, 2017 at 02:36:20PM -0700, Maxim Sloyko wrote:
> Add support for clocks needed by MACs to ast2500 clock driver.
> The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
> PCLK_MAC2 for MAC1 and MAC2 respectively.
>
> The rate of D2-PLL is hardcoded to 250MHz -- the
Add support for clocks needed by MACs to ast2500 clock driver.
The clocks are D2-PLL, which is used by both MACs and PCLK_MAC1 and
PCLK_MAC2 for MAC1 and MAC2 respectively.
The rate of D2-PLL is hardcoded to 250MHz -- the value used in Aspeed
SDK. It is not entirely clear from the datasheet how
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