Re: [U-Boot] [PATCH 2/2] armv8: fsl-lsch2: enable snoopable sata read and write

2016-10-09 Thread york sun
On 08/08/2016 12:18 AM, yuantian.t...@nxp.com wrote: > From: Tang Yuantian > > By default the SATA IP on the ls1043a/ls1046a SoCs does not generating > coherent/snoopable transactions. This patch enable it in the SCFG_SNPCNFGCR > register along with sata axicc register. >

[U-Boot] [PATCH 2/2] armv8: fsl-lsch2: enable snoopable sata read and write

2016-08-08 Thread yuantian.tang
From: Tang Yuantian By default the SATA IP on the ls1043a/ls1046a SoCs does not generating coherent/snoopable transactions. This patch enable it in the SCFG_SNPCNFGCR register along with sata axicc register. In addition, the dma-coherent property must be set on the SATA