On 08/08/2016 12:18 AM, yuantian.t...@nxp.com wrote:
> From: Tang Yuantian
>
> By default the SATA IP on the ls1043a/ls1046a SoCs does not generating
> coherent/snoopable transactions. This patch enable it in the SCFG_SNPCNFGCR
> register along with sata axicc register.
>
From: Tang Yuantian
By default the SATA IP on the ls1043a/ls1046a SoCs does not generating
coherent/snoopable transactions. This patch enable it in the SCFG_SNPCNFGCR
register along with sata axicc register.
In addition, the dma-coherent property must be set on the SATA
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