This patch now uses the correct ECC byte order (Smart Media - SMC)
to be used on the 4xx NAND FLASH driver. Without this patch we have
incompatible ECC byte ordering to the Linux kernel NDFC driver.
Please note that we also have to enable CONFIG_MTD_NAND_ECC_SMC in
drivers/mtd/nand/nand_ecc.c for correct operation. This is done with
a seperate patch.
Signed-off-by: Stefan Roese <s...@denx.de>
Cc: Scott Wood <scottw...@freescale.com>
---
cpu/ppc4xx/ndfc.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/cpu/ppc4xx/ndfc.c b/cpu/ppc4xx/ndfc.c
index ba481ad..971e2ae 100644
--- a/cpu/ppc4xx/ndfc.c
+++ b/cpu/ppc4xx/ndfc.c
@@ -93,8 +93,8 @@ static int ndfc_calculate_ecc(struct mtd_info *mtdinfo,
/* The NDFC uses Smart Media (SMC) bytes order
*/
- ecc_code[0] = p[1];
- ecc_code[1] = p[2];
+ ecc_code[0] = p[2];
+ ecc_code[1] = p[1];
ecc_code[2] = p[3];
return 0;
--
1.6.2.5
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