On Tue, Jun 07, 2016 at 09:43:20AM +0200, Michal Suchanek wrote:
> On 6 June 2016 at 23:21, Ladislav Michl wrote:
> > On Mon, Jun 06, 2016 at 08:50:55PM +0200, Michal Suchanek wrote:
> > Linux already depends on U-Boot as U-Boot feeds Linux with MTD partitions.
>
> No. It
On 6 June 2016 at 23:21, Ladislav Michl wrote:
> On Mon, Jun 06, 2016 at 08:50:55PM +0200, Michal Suchanek wrote:
>> On 6 June 2016 at 09:48, Ladislav Michl wrote:
> [snip]
>> > Okay, specifing size in therms of eraseblock would solve my problem
>> >
On Mon, Jun 06, 2016 at 08:50:55PM +0200, Michal Suchanek wrote:
> On 6 June 2016 at 09:48, Ladislav Michl wrote:
[snip]
> > Okay, specifing size in therms of eraseblock would solve my problem
> > and I have to admit I'm not aware such a thing exists. Any pointer to
> > the
On 6 June 2016 at 09:48, Ladislav Michl wrote:
> On Mon, Jun 06, 2016 at 09:08:47AM +0200, Michal Suchanek wrote:
>> On 5 June 2016 at 20:23, Ladislav Michl wrote:
>> > Unless I'm missing something, partition layout is passed to the kernel
>> > from
On Mon, Jun 06, 2016 at 09:08:47AM +0200, Michal Suchanek wrote:
> On 5 June 2016 at 20:23, Ladislav Michl wrote:
> > On Sun, Jun 05, 2016 at 07:58:46PM +0200, Michal Suchanek wrote:
> >> There is similar problem on sunxi.
> >>
> >> Given this flash is non-removable and has
On 5 June 2016 at 20:23, Ladislav Michl wrote:
> On Sun, Jun 05, 2016 at 07:58:46PM +0200, Michal Suchanek wrote:
>> Hello,
>>
>> On 5 June 2016 at 19:43, Ladislav Michl wrote:
>> > Some CPUs contains boot ROM code capable reading first few blocks
>> >
On Sun, Jun 05, 2016 at 07:58:46PM +0200, Michal Suchanek wrote:
> Hello,
>
> On 5 June 2016 at 19:43, Ladislav Michl wrote:
> > Some CPUs contains boot ROM code capable reading first few blocks
> > (where SPL resides) of NAND flash and executing it. It is wise to
> >
Hello,
On 5 June 2016 at 19:43, Ladislav Michl wrote:
> Some CPUs contains boot ROM code capable reading first few blocks
> (where SPL resides) of NAND flash and executing it. It is wise to
> create separate partition here for SPL. As block size depends on
> NAND chip used,
Some CPUs contains boot ROM code capable reading first few blocks
(where SPL resides) of NAND flash and executing it. It is wise to
create separate partition here for SPL. As block size depends on
NAND chip used, we could either use worst case (biggest) partition
size or base its size on actual
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