On Thursday, August 13, 2015 at 02:36:27 AM, vikasm wrote:
> Hi Marek,
Hi!
> On 08/12/2015 05:26 PM, Marek Vasut wrote:
> > On Thursday, August 13, 2015 at 02:16:21 AM, vikasm wrote:
> >> Hi Marek,
> >>
> >> On 08/12/2015 01:22 PM, Marek Vasut wrote:
> >>> On Wednesday, August 12, 2015 at 07:52:
Hi Marek,
On 08/12/2015 05:26 PM, Marek Vasut wrote:
> On Thursday, August 13, 2015 at 02:16:21 AM, vikasm wrote:
>> Hi Marek,
>>
>> On 08/12/2015 01:22 PM, Marek Vasut wrote:
>>> On Wednesday, August 12, 2015 at 07:52:28 PM, vikasm wrote:
Thanks Jagan,
On 08/12/2015 05:01 AM, Jagan
On Thursday, August 13, 2015 at 02:16:21 AM, vikasm wrote:
> Hi Marek,
>
> On 08/12/2015 01:22 PM, Marek Vasut wrote:
> > On Wednesday, August 12, 2015 at 07:52:28 PM, vikasm wrote:
> >> Thanks Jagan,
> >>
> >> On 08/12/2015 05:01 AM, Jagan Teki wrote:
> >>> Vikas,
> >>>
> >>> Did you verified o
Hi Marek,
On 08/12/2015 01:22 PM, Marek Vasut wrote:
> On Wednesday, August 12, 2015 at 07:52:28 PM, vikasm wrote:
>> Thanks Jagan,
>>
>> On 08/12/2015 05:01 AM, Jagan Teki wrote:
>>> Vikas,
>>>
>>> Did you verified on board, can you just verified with 'sf update' before
>>> and after.. I just wan
On Wednesday, August 12, 2015 at 07:52:28 PM, vikasm wrote:
> Thanks Jagan,
>
> On 08/12/2015 05:01 AM, Jagan Teki wrote:
> > Vikas,
> >
> > Did you verified on board, can you just verified with 'sf update' before
> > and after.. I just wanted to see if you get any performance
> > improvement wit
Thanks Jagan,
On 08/12/2015 05:01 AM, Jagan Teki wrote:
> Vikas,
>
> Did you verified on board, can you just verified with 'sf update' before
> and after.. I just wanted to see if you get any performance
> improvement with these
> optimization fixes.
The main point is someone needs to debug the
Vikas,
Did you verified on board, can you just verified with 'sf update' before
and after.. I just wanted to see if you get any performance
improvement with these
optimization fixes.
Will get back again for my comments.
On 12 August 2015 at 17:06, Stefan Roese wrote:
> Hi Vikas,
>
> (added Mare
Hi Vikas,
(added Marek to Cc)
On 11.08.2015 23:19, vikasm wrote:
On 07/23/2015 05:22 AM, Stefan Roese wrote:
Hi Vikas,
On 16.07.2015 08:46, Stefan Roese wrote:
In addition can you please check the patch causing this instability on
socfpga. I don't like to bug you but to close this patchset,
Hi Stefan,
On 07/23/2015 05:22 AM, Stefan Roese wrote:
> Hi Vikas,
>
> On 16.07.2015 08:46, Stefan Roese wrote:
> In addition can you please check the patch causing this instability on
> socfpga. I don't like to bug you but to close this patchset, this info
> & tests mentioned above s
Hi Vikas,
On 16.07.2015 08:46, Stefan Roese wrote:
In addition can you please check the patch causing this instability on
socfpga. I don't like to bug you but to close this patchset, this info
& tests mentioned above seems to be required.
Okay. I'll try to find some time this week to do some t
Hi Vikas,
On 15.07.2015 23:14, Vikas MANOCHA wrote:
In addition can you please check the patch causing this instability on
socfpga. I don't like to bug you but to close this patchset, this info
& tests mentioned above seems to be required.
Okay. I'll try to find some time this week to do s
Hi Stefan,
> -Original Message-
> From: Stefan Roese [mailto:s...@denx.de]
> Sent: Monday, July 13, 2015 2:01 AM
> To: Vikas MANOCHA
> Cc: u-boot@lists.denx.de; grmo...@opensource.altera.com;
> dingu...@opensource.altera.com; jt...@openedev.com
> Subject: Re: [PATCH RESEND 0/7] spi: cadenc
Hi Vikas,
On 09.07.2015 03:29, Vikas MANOCHA wrote:
-Original Message-
From: Vikas MANOCHA
Sent: Wednesday, July 01, 2015 9:25 AM
To: 'Stefan Roese'
Cc: 'u-boot@lists.denx.de'; 'grmo...@opensource.altera.com';
'dingu...@opensource.altera.com'; 'jt...@openedev.com'
Subject: RE: [PATCH RES
Hi Stefan,
> -Original Message-
> From: Vikas MANOCHA
> Sent: Wednesday, July 01, 2015 9:25 AM
> To: 'Stefan Roese'
> Cc: 'u-boot@lists.denx.de'; 'grmo...@opensource.altera.com';
> 'dingu...@opensource.altera.com'; 'jt...@openedev.com'
> Subject: RE: [PATCH RESEND 0/7] spi: cadence_qspi: o
On 07/02/2015 12:50 PM, Vikas MANOCHA wrote:
Hi Graham,
-Original Message-
From: Graham Moore [mailto:grmo...@opensource.altera.com]
Sent: Tuesday, June 23, 2015 7:37 AM
To: Vikas MANOCHA
Cc: Stefan Roese; u-boot@lists.denx.de; dingu...@opensource.altera.com;
jt...@openedev.com
Subject:
Hi Graham,
> -Original Message-
> From: Graham Moore [mailto:grmo...@opensource.altera.com]
> Sent: Monday, July 06, 2015 10:57 AM
> To: Vikas MANOCHA
> Cc: Stefan Roese; u-boot@lists.denx.de; dingu...@opensource.altera.com;
> jt...@openedev.com
> Subject: Re: [PATCH RESEND 0/7] spi: caden
Hi Graham,
> -Original Message-
> From: Graham Moore [mailto:grmo...@opensource.altera.com]
> Sent: Tuesday, June 23, 2015 7:37 AM
> To: Vikas MANOCHA
> Cc: Stefan Roese; u-boot@lists.denx.de; dingu...@opensource.altera.com;
> jt...@openedev.com
> Subject: Re: [PATCH RESEND 0/7] spi: caden
Hi Stefan,
> -Original Message-
> From: Vikas MANOCHA
> Sent: Monday, June 22, 2015 4:31 PM
> To: 'Stefan Roese'
> Cc: u-boot@lists.denx.de; grmo...@opensource.altera.com;
> dingu...@opensource.altera.com; jt...@openedev.com
> Subject: RE: [PATCH RESEND 0/7] spi: cadence_qspi: optimize & f
On 06/22/2015 06:31 PM, Vikas MANOCHA wrote:
...
The point is if after applying above mentioned patch (...: fix
indirect read/write start address), Read/write are working fine, then
trigger_base value of 0xFFA00_ should also work fine.
Can you please modify the trigger_base value from 0x0 to
Hi Graham,
> -Original Message-
> From: Graham Moore [mailto:grmo...@opensource.altera.com]
> Sent: Tuesday, June 23, 2015 7:37 AM
> To: Vikas MANOCHA
> Cc: Stefan Roese; u-boot@lists.denx.de; dingu...@opensource.altera.com;
> jt...@openedev.com
> Subject: Re: [PATCH RESEND 0/7] spi: caden
Thanks Stefan,
> -Original Message-
> From: Stefan Roese [mailto:s...@denx.de]
> Sent: Monday, June 22, 2015 1:35 AM
> To: Vikas MANOCHA
> Cc: u-boot@lists.denx.de; grmo...@opensource.altera.com;
> dingu...@opensource.altera.com; jt...@openedev.com
> Subject: Re: [PATCH RESEND 0/7] spi: ca
Hi Vikas,
On 19.06.2015 23:38, Vikas MANOCHA wrote:
- git bisect or cherry-pick to find out which patch is breaking the
read functionality.
This one is the first introducing this breakage:
spi: cadence_qspi: fix base trigger address & transfer start address
Ok, can you confirm applying
Thanks Stefan,
> -Original Message-
> From: Stefan Roese [mailto:s...@denx.de]
> Sent: Thursday, June 18, 2015 11:16 PM
> To: Vikas MANOCHA
> Cc: u-boot@lists.denx.de; grmo...@opensource.altera.com;
> dingu...@opensource.altera.com; jt...@openedev.com
> Subject: Re: [PATCH RESEND 0/7] spi:
Hi Vikas,
On 18.06.2015 20:05, Vikas MANOCHA wrote:
>> $ make -s -j10
>> Error: arch/arm/dts/socfpga.dtsi:637.5-6 syntax error FATAL ERROR: Unable
>> to parse input tree
>> Error: arch/arm/dts/socfpga.dtsi:637.5-6 syntax error FATAL ERROR: Unable
>> to parse input tree
>> make[2]: *** [arch/arm
Thanks Stefan,
> -Original Message-
> From: Stefan Roese [mailto:s...@denx.de]
> Sent: Thursday, June 18, 2015 5:02 AM
> To: Vikas MANOCHA
> Cc: u-boot@lists.denx.de; grmo...@opensource.altera.com;
> dingu...@opensource.altera.com; jt...@openedev.com
> Subject: Re: [PATCH RESEND 0/7] spi:
Hi Vikas,
I finally got to testing your latest patchset. And have
some comments / problems:
On 17.06.2015 04:14, Vikas Manocha wrote:
> This patchset:
> - removes sram polling while reading/writing from flash.
> - fixes trigger base & transfer start address register programming. This fix
> supers
This patchset:
- removes sram polling while reading/writing from flash.
- fixes trigger base & transfer start address register programming. This fix
superseeds the previous patch "spi: cadence_qspi: Fix the indirect ahb trigger
address setting"
- adds support to get fifo width from device tree
Vik
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