On 01/20/2011 09:46 AM, Stefano Babic wrote:
From: Anatolij Gustschin ag...@denx.de
The MXC SPI driver didn't calculate the SPI clock up to
now and just used highest possible divider 512 for DATA
RATE in the control register. This results in very low
transfer rates.
The patch adds code
From: Anatolij Gustschin ag...@denx.de
The MXC SPI driver didn't calculate the SPI clock up to
now and just used highest possible divider 512 for DATA
RATE in the control register. This results in very low
transfer rates.
The patch adds code to calculate and setup the SPI clock
frequency for
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