On Fri, Feb 17, 2017 at 3:22 AM, Bin Meng wrote:
> On Wed, Feb 15, 2017 at 5:52 PM, Andy Shevchenko
> wrote:
>> On Wed, 2017-02-15 at 11:10 +0800, Bin Meng wrote:
>>> On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko
>>> wrote:
>> This code is executed when neither of option is defined. For Int
Hi Andy,
On Wed, Feb 15, 2017 at 5:52 PM, Andy Shevchenko
wrote:
> On Wed, 2017-02-15 at 11:10 +0800, Bin Meng wrote:
>> Hi Andy,
>>
>> On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko
>> wrote:
>> > There is no microcode update available for SoCs used on Intel MID
>> > platforms.
>> >
>> > Use
On 14 February 2017 at 07:47, Andy Shevchenko
wrote:
> There is no microcode update available for SoCs used on Intel MID
> platforms.
>
> Use conditional to bypass it.
>
> Signed-off-by: Andy Shevchenko
> ---
> arch/x86/cpu/mp_init.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Revie
On Wed, 2017-02-15 at 11:10 +0800, Bin Meng wrote:
> Hi Andy,
>
> On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko
> wrote:
> > There is no microcode update available for SoCs used on Intel MID
> > platforms.
> >
> > Use conditional to bypass it.
> >
> > Signed-off-by: Andy Shevchenko
> > ---
Hi Andy,
On Tue, Feb 14, 2017 at 10:47 PM, Andy Shevchenko
wrote:
> There is no microcode update available for SoCs used on Intel MID
> platforms.
>
> Use conditional to bypass it.
>
> Signed-off-by: Andy Shevchenko
> ---
> arch/x86/cpu/mp_init.c | 2 +-
> 1 file changed, 1 insertion(+), 1 dele
There is no microcode update available for SoCs used on Intel MID
platforms.
Use conditional to bypass it.
Signed-off-by: Andy Shevchenko
---
arch/x86/cpu/mp_init.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 988073cc
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