On Sat, 2018-06-23 at 05:29 +0200, Marek Vasut wrote:
> On 06/21/2018 08:31 AM, Chee, Tien Fong wrote:
> >
> > On Thu, 2018-06-21 at 06:34 +0200, Marek Vasut wrote:
> > >
> > > On 06/20/2018 09:06 AM, tien.fong.c...@intel.com wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > >
On 06/21/2018 08:31 AM, Chee, Tien Fong wrote:
> On Thu, 2018-06-21 at 06:34 +0200, Marek Vasut wrote:
>> On 06/20/2018 09:06 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> In ARM 64-bits, memory size can be supported is more than 4GB,
>>> hence increasing save array is n
On Thu, 2018-06-21 at 06:34 +0200, Marek Vasut wrote:
> On 06/20/2018 09:06 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > In ARM 64-bits, memory size can be supported is more than 4GB,
> > hence increasing save array is needed to cope with testing larger
> > memory.
>
On 06/20/2018 09:06 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> In ARM 64-bits, memory size can be supported is more than 4GB,
> hence increasing save array is needed to cope with testing larger memory.
>
> Signed-off-by: Tien Fong Chee
> ---
>
> Changes in v2:
> - Change sa
From: Tien Fong Chee
In ARM 64-bits, memory size can be supported is more than 4GB,
hence increasing save array is needed to cope with testing larger memory.
Signed-off-by: Tien Fong Chee
---
Changes in v2:
- Change save array size to save[BITS_PER_LONG - 1]
---
common/memsize.c | 2 +-
1 fil
5 matches
Mail list logo