Am 14.04.2013 09:08, schrieb Dirk Behme:
Am 10.04.2013 01:06, schrieb Fabio Estevam:
From: Fabio Estevam fabio.este...@freescale.com
The glitch in the SPI clock line, which commit 3cea335c34 (spi:
mxc_spi: Fix spi
clock glitch durant reset) solved, is back now and itwas
re-introduced by
commit
Am 10.04.2013 01:06, schrieb Fabio Estevam:
From: Fabio Estevam fabio.este...@freescale.com
The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi
clock glitch durant reset) solved, is back now and itwas re-introduced by
commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset
On 10/04/2013 14:01, Fabio Estevam wrote:
Hi Stefano,
On Wed, Apr 10, 2013 at 3:10 AM, Stefano Babic sba...@denx.de wrote:
I am afraid you are breaking MX3x / MX25 because you add
MXC_CSPICTRL_MODE_MASK only to MX5 / MX6.
It will not break other platforms because this code is protected
On 10/04/2013 01:06, Fabio Estevam wrote:
From: Fabio Estevam fabio.este...@freescale.com
The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix
spi
clock glitch durant reset) solved, is back now and itwas re-introduced by
commit d36b39bf0d (spi: mxc_spi: Fix ECSPI
Hi Stefano,
On Wed, Apr 10, 2013 at 3:10 AM, Stefano Babic sba...@denx.de wrote:
I am afraid you are breaking MX3x / MX25 because you add
MXC_CSPICTRL_MODE_MASK only to MX5 / MX6.
It will not break other platforms because this code is protected with
a #ifdef MXC_ECSPI.
And MXC_ECSPI is only
From: Fabio Estevam fabio.este...@freescale.com
The glitch in the SPI clock line, which commit 3cea335c34 (spi: mxc_spi: Fix spi
clock glitch durant reset) solved, is back now and itwas re-introduced by
commit d36b39bf0d (spi: mxc_spi: Fix ECSPI reset handling).
Actually the glitch is happening
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