Hi,
On 25 September 2017 at 02:40, wrote:
> From: Tien Fong Chee
>
> These drivers handle FPGA program operation from flash loading
> RBF to memory and then to program FPGA.
>
> Signed-off-by: Tien Fong Chee
> ---
> .../include/mach/fpga_manager_arria10.h| 27 ++
> drivers/fpga/s
On 09/28/2017 05:14 PM, Chee, Tien Fong wrote:
> On Rab, 2017-09-27 at 11:23 +0200, Marek Vasut wrote:
>> On 09/27/2017 11:13 AM, Chee, Tien Fong wrote:
>>>
>>> On Sel, 2017-09-26 at 12:39 +0200, Marek Vasut wrote:
On 09/26/2017 11:52 AM, Chee, Tien Fong wrote:
>
>
> On Isn, 2
On Rab, 2017-09-27 at 11:23 +0200, Marek Vasut wrote:
> On 09/27/2017 11:13 AM, Chee, Tien Fong wrote:
> >
> > On Sel, 2017-09-26 at 12:39 +0200, Marek Vasut wrote:
> > >
> > > On 09/26/2017 11:52 AM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut
On Rab, 2017-09-27 at 10:30 +0200, Marek Vasut wrote:
> On 09/27/2017 08:05 AM, Chee, Tien Fong wrote:
> >
> > On Sel, 2017-09-26 at 12:32 +0200, Marek Vasut wrote:
> > >
> > > On 09/26/2017 10:30 AM, Chee, Tien Fong wrote:
> > > >
> > > >
> > > > On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut
On 09/27/2017 11:13 AM, Chee, Tien Fong wrote:
> On Sel, 2017-09-26 at 12:39 +0200, Marek Vasut wrote:
>> On 09/26/2017 11:52 AM, Chee, Tien Fong wrote:
>>>
>>> On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
>
>
>
On Sel, 2017-09-26 at 12:39 +0200, Marek Vasut wrote:
> On 09/26/2017 11:52 AM, Chee, Tien Fong wrote:
> >
> > On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
> > >
> > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > >
On 09/27/2017 08:05 AM, Chee, Tien Fong wrote:
> On Sel, 2017-09-26 at 12:32 +0200, Marek Vasut wrote:
>> On 09/26/2017 10:30 AM, Chee, Tien Fong wrote:
>>>
>>> On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
>
>
>
On Sel, 2017-09-26 at 12:32 +0200, Marek Vasut wrote:
> On 09/26/2017 10:30 AM, Chee, Tien Fong wrote:
> >
> > On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
> > >
> > > On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> > > >
> > > >
> > > > From: Tien Fong Chee
> > > >
> > > >
On 09/26/2017 11:52 AM, Chee, Tien Fong wrote:
> On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
>> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> These drivers handle FPGA program operation from flash loading
>>> RBF to memory and then to progra
On 09/26/2017 10:30 AM, Chee, Tien Fong wrote:
> On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
>> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
>>>
>>> From: Tien Fong Chee
>>>
>>> These drivers handle FPGA program operation from flash loading
>>> RBF to memory and then to progra
On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > These drivers handle FPGA program operation from flash loading
> > RBF to memory and then to program FPGA.
> >
> > Signed-off-by: Tien Fong Chee
On Isn, 2017-09-25 at 11:14 +0200, Marek Vasut wrote:
> On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > These drivers handle FPGA program operation from flash loading
> > RBF to memory and then to program FPGA.
> >
> > Signed-off-by: Tien Fong Chee
On 09/25/2017 10:40 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> These drivers handle FPGA program operation from flash loading
> RBF to memory and then to program FPGA.
>
> Signed-off-by: Tien Fong Chee
Did you run checkpatch on this before submitting ? I presume no ...
> -
From: Tien Fong Chee
These drivers handle FPGA program operation from flash loading
RBF to memory and then to program FPGA.
Signed-off-by: Tien Fong Chee
---
.../include/mach/fpga_manager_arria10.h| 27 ++
drivers/fpga/socfpga_arria10.c | 391 ++
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