Re: [U-Boot] [PATCH v2 1/7] rockchip: rk3399: update PPLL and pmu_pclk frequency

2016-09-22 Thread Simon Glass
On 8 September 2016 at 19:19, Kever Yang wrote: > Update PPLL to 676MHz and PMU_PCLK to 48MHz, because: > 1. 48MHz can make sure the pwm can get exact 50% duty ratio, but 99MHz > can not, > 2. We think 48MHz is fast enough for pmu pclk and it is lower power cost > than

[U-Boot] [PATCH v2 1/7] rockchip: rk3399: update PPLL and pmu_pclk frequency

2016-09-08 Thread Kever Yang
Update PPLL to 676MHz and PMU_PCLK to 48MHz, because: 1. 48MHz can make sure the pwm can get exact 50% duty ratio, but 99MHz can not, 2. We think 48MHz is fast enough for pmu pclk and it is lower power cost than 99MHz, 3. PPLL 676 MHz and PMU_PCLK 48MHz are the clock rate we are using internally