On 24 August 2015 at 14:21, Christophe Ricard
christophe.ric...@gmail.com wrote:
Hi Simon,
This one is fine with me.
Acked-by: Christophe Ricardchristophe-h.ric...@st.com
Applied to u-boot-dm.
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Hi Simon,
This one is fine with me.
Acked-by: Christophe Ricardchristophe-h.ric...@st.com
Best Regards
Christophe
On 23/08/2015 02:31, Simon Glass wrote:
I2C chips can support a register offset, with registers accessible by
sending this offset as the first part of any read or write
I2C chips can support a register offset, with registers accessible by
sending this offset as the first part of any read or write transaction.
Most I2C chips have a single byte offset, thus the offset length is 1.
This provides access for up 256 registers.
However other offset lengths are
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