Hi Troy, Nitin,
On 07/04/2015 01:33, Troy Kisky wrote:
On 4/6/2015 12:01 PM, nitin.g...@freescale.com wrote:
From: Nitin Garg nitin.g...@freescale.com
Since MX6 is Cortex-A9 r2p10, enable ARM errata
751472, 794072, 761320 only applied to the
following configuration:
This erratum affects
From: Nitin Garg nitin.g...@freescale.com
Since MX6 is Cortex-A9 r2p10, enable ARM errata
751472, 794072, 761320 only applied to the
following configuration:
This erratum affects configurations with either:
- One processor if the ACP is present
- Two or more processors
i.MX6 family does not
On 4/6/2015 12:01 PM, nitin.g...@freescale.com wrote:
From: Nitin Garg nitin.g...@freescale.com
Since MX6 is Cortex-A9 r2p10, enable ARM errata
751472, 794072, 761320 only applied to the
following configuration:
This erratum affects configurations with either:
- One processor if the
3 matches
Mail list logo