On Jum, 2017-10-20 at 10:11 -0500, Dinh Nguyen wrote:
> Please update your commit header.
>
> On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote:
> >
> > From: Tien Fong Chee
> >
> > SPL configures DDR by programming peripheral raw binary file
> > and calibrating
Please update your commit header.
On 10/13/2017 03:08 AM, tien.fong.c...@intel.com wrote:
> From: Tien Fong Chee
>
> SPL configures DDR by programming peripheral raw binary file
> and calibrating DDR.
>
> Signed-off-by: Tien Fong Chee
> ---
From: Tien Fong Chee
SPL configures DDR by programming peripheral raw binary file
and calibrating DDR.
Signed-off-by: Tien Fong Chee
---
arch/arm/mach-socfpga/spl.c | 56 +
1 file changed, 56
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