Enabled zynq qspi controller node for zc702 board.
Signed-off-by: Jagan Teki <jt...@openedev.com>
Cc: Simon Glass <s...@chromium.org>
Cc: Michal Simek <michal.si...@xilinx.com>
Cc: Siva Durga Prasad Paladugu <siva...@xilinx.com>
---
arch/arm/dts/zynq-zc702.dts | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/zynq-zc702.dts b/arch/arm/dts/zynq-zc702.dts
index 6691a8d..4d86960 100644
--- a/arch/arm/dts/zynq-zc702.dts
+++ b/arch/arm/dts/zynq-zc702.dts
@@ -17,6 +17,7 @@
ethernet0 = &gem0;
i2c0 = &i2c0;
serial0 = &uart1;
+ spi0 = &qspi;
};
memory {
@@ -380,6 +381,10 @@
pinctrl-0 = <&pinctrl_uart1_default>;
};
+&qspi {
+ status = "okay";
+};
+
&usb0 {
status = "okay";
dr_mode = "host";
--
1.9.1
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