Removes EL3 specific erratas for TFABOOT, And now taken care in TFA.

ARM_ERRATA_855873, SYS_FSL_ERRATUM_A008850, SYS_FSL_ERRATUM_A008511,
SYS_FSL_ERRATUM_A008336, SYS_FSL_ERRATUM_A009663, SYS_FSL_ERRATUM_A009803
SYS_FSL_ERRATUM_A009942, SYS_FSL_ERRATUM_A010165

Signed-off-by: Rajesh Bhagat <rajesh.bha...@nxp.com>
---
Change in v4: None
Change in v3: None
Change in v2: None

 arch/arm/cpu/armv8/fsl-layerscape/Kconfig | 24 +++++++++++------------
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig 
b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 9092757d1f..1872c66dcd 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -1,7 +1,7 @@
 config ARCH_LS1012A
        bool
        select ARMV8_SET_SMPEN
-       select ARM_ERRATA_855873
+       select ARM_ERRATA_855873 if !TFABOOT
        select FSL_LSCH2
        select SYS_FSL_SRDS_1
        select SYS_HAS_SERDES
@@ -22,22 +22,22 @@ config ARCH_LS1012A
 config ARCH_LS1043A
        bool
        select ARMV8_SET_SMPEN
-       select ARM_ERRATA_855873
+       select ARM_ERRATA_855873 if !TFABOOT
        select FSL_LSCH2
        select SYS_FSL_SRDS_1
        select SYS_HAS_SERDES
        select SYS_FSL_DDR
        select SYS_FSL_DDR_BE
        select SYS_FSL_DDR_VER_50
-       select SYS_FSL_ERRATUM_A008850
+       select SYS_FSL_ERRATUM_A008850 if !TFABOOT
        select SYS_FSL_ERRATUM_A008997
        select SYS_FSL_ERRATUM_A009007
        select SYS_FSL_ERRATUM_A009008
-       select SYS_FSL_ERRATUM_A009660
-       select SYS_FSL_ERRATUM_A009663
+       select SYS_FSL_ERRATUM_A009660 if !TFABOOT
+       select SYS_FSL_ERRATUM_A009663 if !TFABOOT
        select SYS_FSL_ERRATUM_A009798
        select SYS_FSL_ERRATUM_A009929
-       select SYS_FSL_ERRATUM_A009942
+       select SYS_FSL_ERRATUM_A009942 if !TFABOOT
        select SYS_FSL_ERRATUM_A010315
        select SYS_FSL_ERRATUM_A010539
        select SYS_FSL_HAS_DDR3
@@ -62,17 +62,17 @@ config ARCH_LS1046A
        select SYS_FSL_DDR
        select SYS_FSL_DDR_BE
        select SYS_FSL_DDR_VER_50
-       select SYS_FSL_ERRATUM_A008336
-       select SYS_FSL_ERRATUM_A008511
-       select SYS_FSL_ERRATUM_A008850
+       select SYS_FSL_ERRATUM_A008336 if !TFABOOT
+       select SYS_FSL_ERRATUM_A008511 if !TFABOOT
+       select SYS_FSL_ERRATUM_A008850 if !TFABOOT
        select SYS_FSL_ERRATUM_A008997
        select SYS_FSL_ERRATUM_A009007
        select SYS_FSL_ERRATUM_A009008
        select SYS_FSL_ERRATUM_A009798
        select SYS_FSL_ERRATUM_A009801
-       select SYS_FSL_ERRATUM_A009803
-       select SYS_FSL_ERRATUM_A009942
-       select SYS_FSL_ERRATUM_A010165
+       select SYS_FSL_ERRATUM_A009803 if !TFABOOT
+       select SYS_FSL_ERRATUM_A009942 if !TFABOOT
+       select SYS_FSL_ERRATUM_A010165 if !TFABOOT
        select SYS_FSL_ERRATUM_A010539
        select SYS_FSL_HAS_DDR4
        select SYS_FSL_SRDS_2
-- 
2.17.1

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