Re: [U-Boot] [PATCH v6 09/16] clk: Add SiFive FU540 PRCI clock driver

2019-02-11 Thread Auer, Lukas
On Mon, 2019-02-11 at 04:32 +, Anup Patel wrote: > > -Original Message- > > From: Auer, Lukas [mailto:lukas.a...@aisec.fraunhofer.de] > > Sent: Monday, February 11, 2019 12:10 AM > > To: s...@chromium.org; michal.si...@xilinx.com; bmeng...@gmail.com; > > joe.hershber...@ni.com;

Re: [U-Boot] [PATCH v6 09/16] clk: Add SiFive FU540 PRCI clock driver

2019-02-10 Thread Anup Patel
> -Original Message- > From: Auer, Lukas [mailto:lukas.a...@aisec.fraunhofer.de] > Sent: Monday, February 11, 2019 12:10 AM > To: s...@chromium.org; michal.si...@xilinx.com; bmeng...@gmail.com; > joe.hershber...@ni.com; r...@andestech.com; > yamada.masah...@socionext.com;

Re: [U-Boot] [PATCH v6 09/16] clk: Add SiFive FU540 PRCI clock driver

2019-02-10 Thread Auer, Lukas
On Sat, 2019-02-09 at 06:32 +, Anup Patel wrote: > Add driver code for the SiFive FU540 PRCI IP block. This IP block > handles reset and clock control for the SiFive FU540 device and > implements SoC-level clock tree controls and dividers. > > Based on code written by Wesley Terpstra >

[U-Boot] [PATCH v6 09/16] clk: Add SiFive FU540 PRCI clock driver

2019-02-08 Thread Anup Patel
Add driver code for the SiFive FU540 PRCI IP block. This IP block handles reset and clock control for the SiFive FU540 device and implements SoC-level clock tree controls and dividers. Based on code written by Wesley Terpstra found in commit 999529edf517ed75b56659d456d221b2ee56bb60 of: