On Fri, May 18, 2018 at 01:55:31PM +0200, Marek Vasut wrote:
> On 05/18/2018 01:51 PM, Maxime Ripard wrote:
> > On Mon, May 14, 2018 at 11:13:54AM +0200, Marek Vasut wrote:
> >>> And I don't really know what the constraints are on the SPL side, but
> >>> it's really tight on our end. So maybe I'm
On 05/18/2018 01:51 PM, Maxime Ripard wrote:
> On Mon, May 14, 2018 at 11:13:54AM +0200, Marek Vasut wrote:
>>> And I don't really know what the constraints are on the SPL side, but
>>> it's really tight on our end. So maybe I'm exagerating, but you're
>>> definitely understating it too.
>>
>> You
On Mon, May 14, 2018 at 11:13:54AM +0200, Marek Vasut wrote:
> > And I don't really know what the constraints are on the SPL side, but
> > it's really tight on our end. So maybe I'm exagerating, but you're
> > definitely understating it too.
>
> You can fit into 16k , can you not ?
We have 13k.
On 05/14/2018 11:05 AM, Maxime Ripard wrote:
> On Sat, May 12, 2018 at 02:12:43PM +0200, Marek Vasut wrote:
>>> Since the first post of these patches, you've asked to rework in a
>>> significant manner the driver already, including doing a new PHY
>>> driver to use the device model,
On Sat, May 12, 2018 at 02:12:43PM +0200, Marek Vasut wrote:
> > Since the first post of these patches, you've asked to rework in a
> > significant manner the driver already, including doing a new PHY
> > driver to use the device model, and making other substantial changes
> > to
On 05/11/2018 11:29 PM, Maxime Ripard wrote:
> On Mon, May 07, 2018 at 10:55:16PM +0200, Marek Vasut wrote:
>> On 05/07/2018 10:11 PM, Maxime Ripard wrote:
>>> On Mon, May 07, 2018 at 05:32:34PM +0200, Marek Vasut wrote:
On 05/07/2018 04:52 PM, Maxime Ripard wrote:
> On Mon, May 07, 2018
On Mon, May 07, 2018 at 10:55:16PM +0200, Marek Vasut wrote:
> On 05/07/2018 10:11 PM, Maxime Ripard wrote:
> > On Mon, May 07, 2018 at 05:32:34PM +0200, Marek Vasut wrote:
> >> On 05/07/2018 04:52 PM, Maxime Ripard wrote:
> >>> On Mon, May 07, 2018 at 01:47:43PM +0200, Marek Vasut wrote:
>
Hi Marek,
On Mon, May 7, 2018 at 5:17 PM, Marek Vasut wrote:
> On 05/07/2018 09:33 AM, Jagan Teki wrote:
>> Add OTG device clkgate and reset for H3/H5 through driver_data.
>>
>> Signed-off-by: Jagan Teki
>
> Why don't you implement a clock driver for
On 05/07/2018 10:11 PM, Maxime Ripard wrote:
> On Mon, May 07, 2018 at 05:32:34PM +0200, Marek Vasut wrote:
>> On 05/07/2018 04:52 PM, Maxime Ripard wrote:
>>> On Mon, May 07, 2018 at 01:47:43PM +0200, Marek Vasut wrote:
On 05/07/2018 09:33 AM, Jagan Teki wrote:
> Add OTG device clkgate
On Mon, May 07, 2018 at 05:32:34PM +0200, Marek Vasut wrote:
> On 05/07/2018 04:52 PM, Maxime Ripard wrote:
> > On Mon, May 07, 2018 at 01:47:43PM +0200, Marek Vasut wrote:
> >> On 05/07/2018 09:33 AM, Jagan Teki wrote:
> >>> Add OTG device clkgate and reset for H3/H5 through driver_data.
> >>>
>
On 05/07/2018 04:52 PM, Maxime Ripard wrote:
> On Mon, May 07, 2018 at 01:47:43PM +0200, Marek Vasut wrote:
>> On 05/07/2018 09:33 AM, Jagan Teki wrote:
>>> Add OTG device clkgate and reset for H3/H5 through driver_data.
>>>
>>> Signed-off-by: Jagan Teki
>>
>> Why
On Mon, May 07, 2018 at 01:47:43PM +0200, Marek Vasut wrote:
> On 05/07/2018 09:33 AM, Jagan Teki wrote:
> > Add OTG device clkgate and reset for H3/H5 through driver_data.
> >
> > Signed-off-by: Jagan Teki
>
> Why don't you implement a clock driver for this SoC
On 05/07/2018 09:33 AM, Jagan Teki wrote:
> Add OTG device clkgate and reset for H3/H5 through driver_data.
>
> Signed-off-by: Jagan Teki
Why don't you implement a clock driver for this SoC instead ?
--
Best regards,
Marek Vasut
Add OTG device clkgate and reset for H3/H5 through driver_data.
Signed-off-by: Jagan Teki
---
drivers/usb/musb-new/sunxi.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c
index
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