Hi Fabio,
On 09/09/2014 01:52, Fabio Estevam wrote:
Hi Tom,
On Sat, Aug 30, 2014 at 4:21 PM, Tom Rini tr...@ti.com wrote:
On Sat, Aug 30, 2014 at 02:22:22PM -0300, Fabio Estevam wrote:
Tom, Joe or Stefano,
On Mon, Aug 25, 2014 at 4:51 PM, Marek Vasut ma...@denx.de wrote:
On Monday,
Hi Stefano,
On Tue, Sep 9, 2014 at 10:09 AM, Stefano Babic sba...@denx.de wrote:
Fabio, I will try to dig in all patches that queue in last two weeks. If
you can, please take a look next week what is still missing and send me
a remind - thanks !
Excellent, thanks!
Hi Tom,
On Sat, Aug 30, 2014 at 4:21 PM, Tom Rini tr...@ti.com wrote:
On Sat, Aug 30, 2014 at 02:22:22PM -0300, Fabio Estevam wrote:
Tom, Joe or Stefano,
On Mon, Aug 25, 2014 at 4:51 PM, Marek Vasut ma...@denx.de wrote:
On Monday, August 25, 2014 at 06:34:16 PM, Fabio Estevam wrote:
Hi Stefano,
On Mon, Aug 25, 2014 at 1:34 PM, Fabio Estevam
fabio.este...@freescale.com wrote:
mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
Other SoCs work with the standard 32 bytes alignment.
Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA
Tom, Joe or Stefano,
On Mon, Aug 25, 2014 at 4:51 PM, Marek Vasut ma...@denx.de wrote:
On Monday, August 25, 2014 at 06:34:16 PM, Fabio Estevam wrote:
mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
Other SoCs work with the standard 32 bytes alignment.
Adjust it
On Sat, Aug 30, 2014 at 02:22:22PM -0300, Fabio Estevam wrote:
Tom, Joe or Stefano,
On Mon, Aug 25, 2014 at 4:51 PM, Marek Vasut ma...@denx.de wrote:
On Monday, August 25, 2014 at 06:34:16 PM, Fabio Estevam wrote:
mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
Other SoCs work with the standard 32 bytes alignment.
Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers,
which addresses the needs from mx6solox and also works for the other SoCs.
Signed-off-by:
On Monday, August 25, 2014 at 06:34:16 PM, Fabio Estevam wrote:
mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
Other SoCs work with the standard 32 bytes alignment.
Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers,
which addresses the needs
8 matches
Mail list logo
