On Fri, Nov 3, 2017 at 7:25 PM, Benoît Thébaudeau
wrote:
> Thanks. If NXP could update the corresponding errata sheets, that
> would be great.
Agreed. I will check with them.
Regards,
Fabio Estevam
___
U-Boot mailing
Hi Fabio,
On Fri, Nov 3, 2017 at 4:17 PM, Fabio Estevam wrote:
> On Sun, Oct 29, 2017 at 7:18 PM, Benoît Thébaudeau
> wrote:
>
>> Of course we can, but CONFIG_SYS_FSL_ERRATUM_ESDHC_A001 seems to be
>> the most optimal approach here, so I'll
Hi Benoît,
On Sun, Oct 29, 2017 at 7:18 PM, Benoît Thébaudeau
wrote:
> Of course we can, but CONFIG_SYS_FSL_ERRATUM_ESDHC_A001 seems to be
> the most optimal approach here, so I'll wait for the answer from your
> design team before doing anything.
I received
Hi Benoît ,
On Sun, Oct 29, 2017 at 7:18 PM, Benoît Thébaudeau
wrote:
> Of course we can, but CONFIG_SYS_FSL_ERRATUM_ESDHC_A001 seems to be
> the most optimal approach here, so I'll wait for the answer from your
> design team before doing anything.
I have just
Hi Fabio,
On Tue, Oct 24, 2017 at 10:50 AM, Fabio Estevam wrote:
> On Mon, Oct 23, 2017 at 8:45 PM, Benoît Thébaudeau
> wrote:
>
>> The issue is the timeout in esdhc_setup_data() on line 309. If I
>> revert e978a31b and fb823981, then
Hi Benoît,
On Mon, Oct 23, 2017 at 8:45 PM, Benoît Thébaudeau
wrote:
> The issue is the timeout in esdhc_setup_data() on line 309. If I
> revert e978a31b and fb823981, then everything works fine. However, the
> latest calculation is correct, so reverting these
Hi Fabio,
On Sat, Oct 21, 2017 at 2:38 PM, Fabio Estevam wrote:
> On Sat, Oct 21, 2017 at 10:34 AM, Benoît Thébaudeau
> wrote:
>
>> I already have a mainline version working at HS with changes only in
>> fsl_esdhc.c (apart from the port of my
Hi Benoît,
On Sat, Oct 21, 2017 at 10:34 AM, Benoît Thébaudeau
wrote:
> I already have a mainline version working at HS with changes only in
> fsl_esdhc.c (apart from the port of my board). I still have to narrow
> these changes down to the issue.
Ok, great!
>
Hi Fabio,
On Fri, Oct 20, 2017 at 8:40 PM, Fabio Estevam wrote:
> On Fri, Oct 20, 2017 at 10:40 AM, Benoît Thébaudeau
> wrote:
>
>> With mainline U-Boot on my board, normal-speed SD cards work fine, but not HS
>> ones. Both types of cards work fine at 48
Hi Benoît,
On Fri, Oct 20, 2017 at 10:40 AM, Benoît Thébaudeau wrote:
> With mainline U-Boot on my board, normal-speed SD cards work fine, but not HS
> ones. Both types of cards work fine at 48 MHz with my custom and older U-Boot.
Ok, great! What is the version of your old
Hi Fabio,
On 19/10/2017 at 13:57, Fabio Estevam wrote:
>
> I would be interested to see if you can get an SD card high speed to
> work with mainline U-Boot on your board.
>
> On my tests I need to force it 25MHz operation to be able to use the SD card.
With mainline U-Boot on my board,
On 19/10/2017 at 14:52, Fabio Estevam wrote:
> On Thu, Oct 19, 2017 at 10:46 AM, Otavio Salvador
> wrote:
>
>> I think the original RFC is better as workaround as it solves the
>> issue for other boards. This does not mean we shouldn't fix the root
>> cause ...
On Thu, Oct 19, 2017 at 10:46 AM, Otavio Salvador
wrote:
> I think the original RFC is better as workaround as it solves the
> issue for other boards. This does not mean we shouldn't fix the root
> cause ...
Actually I don't know if this issue happens with
On Thu, Oct 19, 2017 at 10:42 AM, Fabio Estevam wrote:
> On Thu, Oct 19, 2017 at 9:57 AM, Fabio Estevam wrote:
>
>> On my tests I need to force it 25MHz operation to be able to use the SD card.
>
> A "less ugly" workaround that affects only mx25pdk:
>
>
On Thu, Oct 19, 2017 at 9:57 AM, Fabio Estevam wrote:
> On my tests I need to force it 25MHz operation to be able to use the SD card.
A "less ugly" workaround that affects only mx25pdk:
--- a/board/freescale/mx25pdk/mx25pdk.c
+++ b/board/freescale/mx25pdk/mx25pdk.c
@@
Hi Benoît,
On Wed, Oct 18, 2017 at 6:10 PM, Benoît Thébaudeau
wrote:
> Can you try with this?
>
> static const iomux_v3_cfg_t sdhc1_pads[] = {
> NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, PAD_CTL_PUS_47K_UP |
> PAD_CTL_SRE_FAST),
>
Hi Benoît,
On Wed, Oct 18, 2017 at 6:10 PM, Benoît Thébaudeau
wrote:
> Can you try with this?
>
> static const iomux_v3_cfg_t sdhc1_pads[] = {
> NEW_PAD_CTRL(MX25_PAD_SD1_CMD__SD1_CMD, PAD_CTL_PUS_47K_UP |
> PAD_CTL_SRE_FAST),
>
Hi Fabio,
On Wed, Oct 18, 2017 at 7:35 PM, Fabio Estevam wrote:
> On Wed, Oct 18, 2017 at 2:56 PM, Benoît Thébaudeau wrote:
>
>> I can tell you what to use for imx25pdk if you give me the pads used by the
>> eSDHC instance in question here.
>
> mx25pdk
Hi Benoît ,
On Wed, Oct 18, 2017 at 2:56 PM, Benoît Thébaudeau wrote:
> I can tell you what to use for imx25pdk if you give me the pads used by the
> eSDHC instance in question here.
mx25pdk uses the POR default IOMUX settings for sdhc1:
static const iomux_v3_cfg_t
Hi Fabio,
On 18/10/2017 at 18:40, Fabio Estevam wrote:
> On Wed, Oct 18, 2017 at 2:13 PM, Benoît Thébaudeau wrote:
>> You can try to set the drive strength of all the eSDHC pads to high or max
>> (for
>
> Looks like the eSDHC pins do not have drive strength control, only
>
Hi Benoît,
On Wed, Oct 18, 2017 at 2:13 PM, Benoît Thébaudeau wrote:
> You could stress-test the SD read/write accesses from U-Boot. Does it occur
> with
> all HS cards?
I am not able to run a stress-test because all SD card accesses fail.
It happens with all HS cards I
On 18/10/2017 at 18:13, Benoît Thébaudeau wrote:
> Hi Fabio,
>
> On 18/10/2017 at 17:57, Fabio Estevam wrote:
>> Currently when a high speed SD card is connected on MX25 or MX51 boards
>> the following error happens:
>>
>> U-Boot 2017.11-rc2 (Oct 18 2017 - 13:49:26 -0200)
>>
>> CPU: Freescale
Hi Fabio,
On 18/10/2017 at 17:57, Fabio Estevam wrote:
> Currently when a high speed SD card is connected on MX25 or MX51 boards
> the following error happens:
>
> U-Boot 2017.11-rc2 (Oct 18 2017 - 13:49:26 -0200)
>
> CPU: Freescale i.MX51 rev3.0 at 800 MHz
> Reset cause: POR
> Board: MX51EVK
On Wed, Oct 18, 2017 at 1:57 PM, Fabio Estevam wrote:
> Currently when a high speed SD card is connected on MX25 or MX51 boards
> the following error happens:
>
> U-Boot 2017.11-rc2 (Oct 18 2017 - 13:49:26 -0200)
>
> CPU: Freescale i.MX51 rev3.0 at 800 MHz
> Reset cause:
Currently when a high speed SD card is connected on MX25 or MX51 boards
the following error happens:
U-Boot 2017.11-rc2 (Oct 18 2017 - 13:49:26 -0200)
CPU: Freescale i.MX51 rev3.0 at 800 MHz
Reset cause: POR
Board: MX51EVK
DRAM: 512 MiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1
*** Warning - read
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