Hi Bin,
On 3 November 2014 20:05, Bin Meng wrote:
> Hi Simon,
>
> Thanks for the comments.
>
> On Tue, Nov 4, 2014 at 10:09 AM, Simon Glass wrote:
>> Hi Bin,
>>
>> Well it's certainly not ideal but from what I can tell these blobs are
>> a fact of life on Intel machines still. For the ivybridge
Hi Simon,
Thanks for the comments.
On Tue, Nov 4, 2014 at 10:09 AM, Simon Glass wrote:
> Hi Bin,
>
> Well it's certainly not ideal but from what I can tell these blobs are
> a fact of life on Intel machines still. For the ivybridge stuff, I've
> found I need a microcode blob, a video BIOS blob a
Hi Bin,
On 2 November 2014 19:26, Bin Meng wrote:
> Hi Simon,
>
> I am preparing patches for my U-Boot port on Intel Crown Bay CRB which uses
> Intel FSP for the memory and chipset initialization. Intel FSP is a binary
> blob inside which 3 pre-defined entry pointes are available for 3rd party
>
Hi Simon,
I am preparing patches for my U-Boot port on Intel Crown Bay CRB which uses
Intel FSP for the memory and chipset initialization. Intel FSP is a binary
blob inside which 3 pre-defined entry pointes are available for 3rd party
bootloader to call to perform various jobs at different initial
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