Hi Stefano,
On 04/22/2015 05:02 PM, Stefano Babic wrote:
Hi Nikolay,
On 22/04/2015 14:22, Nikolay Dimitrov wrote:
Hi Stefano,
On 04/22/2015 03:12 PM, Stefano Babic wrote:
Hi Nikolay,
On 17/04/2015 00:36, Nikolay Dimitrov wrote:
This is proposal for clamping the MMDC/DDR3 clocks to the
Hi Nikolay,
On 23/04/2015 16:26, Nikolay Dimitrov wrote:
+arch/arm/cpu/armv7/mx6/ddr.c: In function 'mx6_dram_cfg':
+arch/arm/cpu/armv7/mx6/ddr.c:279:4: error: assignment of member
'mem_speed' in read-only object
+arch/arm/cpu/armv7/mx6/ddr.c:286:4: error: assignment of member
'mem_speed'
Hi Nikolay,
On 22/04/2015 14:22, Nikolay Dimitrov wrote:
Hi Stefano,
On 04/22/2015 03:12 PM, Stefano Babic wrote:
Hi Nikolay,
On 17/04/2015 00:36, Nikolay Dimitrov wrote:
This is proposal for clamping the MMDC/DDR3 clocks to the maximum
supported
frequencies as per imx6 SOC models, and
On 22/04/2015 14:22, Nikolay Dimitrov wrote:
Hi Stefano,
On 04/22/2015 03:12 PM, Stefano Babic wrote:
Hi Nikolay,
On 17/04/2015 00:36, Nikolay Dimitrov wrote:
This is proposal for clamping the MMDC/DDR3 clocks to the maximum
supported
frequencies as per imx6 SOC models, and for
On 04/17/15 01:36, Nikolay Dimitrov wrote:
This is proposal for clamping the MMDC/DDR3 clocks to the maximum supported
frequencies as per imx6 SOC models, and for dynamically calculating valid
clock value based on mem_speed.
Currently the code uses impossible values for mem_speed (1333, 1600
Hi Nikolay,
On 17/04/2015 00:36, Nikolay Dimitrov wrote:
This is proposal for clamping the MMDC/DDR3 clocks to the maximum supported
frequencies as per imx6 SOC models, and for dynamically calculating valid
clock value based on mem_speed.
Currently the code uses impossible values for
Hi Stefano,
On 04/22/2015 03:12 PM, Stefano Babic wrote:
Hi Nikolay,
On 17/04/2015 00:36, Nikolay Dimitrov wrote:
This is proposal for clamping the MMDC/DDR3 clocks to the maximum supported
frequencies as per imx6 SOC models, and for dynamically calculating valid
clock value based on
On Thu, Apr 16, 2015 at 3:36 PM, Nikolay Dimitrov picmas...@mail.bg wrote:
This is proposal for clamping the MMDC/DDR3 clocks to the maximum supported
frequencies as per imx6 SOC models, and for dynamically calculating valid
clock value based on mem_speed.
Currently the code uses impossible
On Thu, Apr 16, 2015 at 7:36 PM, Nikolay Dimitrov picmas...@mail.bg wrote:
This is proposal for clamping the MMDC/DDR3 clocks to the maximum supported
frequencies as per imx6 SOC models, and for dynamically calculating valid
clock value based on mem_speed.
Currently the code uses impossible
This is proposal for clamping the MMDC/DDR3 clocks to the maximum supported
frequencies as per imx6 SOC models, and for dynamically calculating valid
clock value based on mem_speed.
Currently the code uses impossible values for mem_speed (1333, 1600 MT/s) for
calculating the DDR timings, and uses
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