Hi,
On 17/05/18 09:35, Icenowy Zheng wrote:
>
>
> 于 2018年5月17日 GMT+08:00 下午4:16:58, Andre Przywara 写到:
>> This series tries to solve three issues we currently have on
>> Allwinner boards:
>> - The DRAM sizing routine can only cope with power-of-two sized DRAM.
>> - The DRAM sizing routine steps
于 2018年5月17日 GMT+08:00 下午4:16:58, Andre Przywara 写到:
>This series tries to solve three issues we currently have on
>Allwinner boards:
>- The DRAM sizing routine can only cope with power-of-two sized DRAM.
>- The DRAM sizing routine steps through all DRAM, possibly hitting
>secure
> memory.
>- T
On Thu, May 17, 2018 at 09:16:58AM +0100, Andre Przywara wrote:
> This series tries to solve three issues we currently have on
> Allwinner boards:
> - The DRAM sizing routine can only cope with power-of-two sized DRAM.
> - The DRAM sizing routine steps through all DRAM, possibly hitting secure
>
This series tries to solve three issues we currently have on
Allwinner boards:
- The DRAM sizing routine can only cope with power-of-two sized DRAM.
- The DRAM sizing routine steps through all DRAM, possibly hitting secure
memory.
- The SPL header versioning is quite strict and tends to break eve
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