On Mon, Jan 21, 2019 at 6:12 PM Andre Przywara wrote:
>
> On Mon, 21 Jan 2019 18:02:17 +0800
> Chen-Yu Tsai wrote:
>
> > On Mon, Jan 21, 2019 at 5:39 PM Andre Przywara
> > wrote:
> > >
> > > On Mon, 21 Jan 2019 17:34:25 +0800
> > > Chen-Yu Tsai wrote:
> > >
> > > > On Mon, Jan 21, 2019 at 5:32
On Mon, 21 Jan 2019 18:02:17 +0800
Chen-Yu Tsai wrote:
> On Mon, Jan 21, 2019 at 5:39 PM Andre Przywara
> wrote:
> >
> > On Mon, 21 Jan 2019 17:34:25 +0800
> > Chen-Yu Tsai wrote:
> >
> > > On Mon, Jan 21, 2019 at 5:32 PM Jagan Teki
> > > wrote:
> > > >
> > > > On Sat, Jan 19, 2019 at
On Mon, Jan 21, 2019 at 5:39 PM Andre Przywara wrote:
>
> On Mon, 21 Jan 2019 17:34:25 +0800
> Chen-Yu Tsai wrote:
>
> > On Mon, Jan 21, 2019 at 5:32 PM Jagan Teki
> > wrote:
> > >
> > > On Sat, Jan 19, 2019 at 7:02 AM Andre Przywara
> > > wrote:
> > > >
> > > > The A80 handles resets and
On Mon, 21 Jan 2019 17:34:25 +0800
Chen-Yu Tsai wrote:
> On Mon, Jan 21, 2019 at 5:32 PM Jagan Teki
> wrote:
> >
> > On Sat, Jan 19, 2019 at 7:02 AM Andre Przywara
> > wrote:
> > >
> > > The A80 handles resets and clock gates for the MMC devices
> > > differently, outside of the CCU IP
On Mon, Jan 21, 2019 at 5:32 PM Jagan Teki wrote:
>
> On Sat, Jan 19, 2019 at 7:02 AM Andre Przywara wrote:
> >
> > The A80 handles resets and clock gates for the MMC devices differently,
> > outside of the CCU IP block. Consequently we have a separate clock
> > device with a separate binding
On Sat, Jan 19, 2019 at 7:02 AM Andre Przywara wrote:
>
> The A80 handles resets and clock gates for the MMC devices differently,
> outside of the CCU IP block. Consequently we have a separate clock
> device with a separate binding for that.
>
> Implement that with the respective clock gates and
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