t; Subject: Re: [U-Boot] Enabling ARM DCache (and MMU setup) in U-Boot
>
> Hi,
>
> I am having exactly the same problem as described here by
> Drasko. Once I enable MMU on ARM920T by setting the cp15
> register 1, I get a data abort.
> Since the previous messages were posted a
Hi,
Thank you so much for your patch. It works fine on 920T. I am able to set up
MMU without any problem.
-- Rasha
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
> I am having exactly the same problem as described here by Drasko. Once I
> enable MMU on ARM920T by setting the cp15 register 1, I get a data abort.
Would you please try my patch? I haven't tried on 920T, but it worked
well on 926. If needed I can try on 920T, as I have one.
I sent it on Jan 2
Hi,
I am having exactly the same problem as described here by Drasko. Once I
enable MMU on ARM920T by setting the cp15 register 1, I get a data abort.
Since the previous messages were posted a long time back, I was hoping
someone has been able to find a solution to the problem. I am trying to
setu
Hi Drasko,
I have now the same problem. You have posted, that you have finished you're
work successfully, but I can't find a patch. Is it possible to get the
source for enable MMU and dcache?
Thanks,
Andreas
___
U-Boot mailing list
U-Boot@lists.
On Tue, Mar 31, 2009 at 4:09 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
> if you want to use the dcache you must first correctly setup the MMU and
the TLB
I set-up :
1) pagetable in the SDRAM (one master pagetable, to map all 4096 pages of
address space to map from the virtual to the same address
On Tue, Mar 31, 2009 at 4:09 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>Honnestly we will not work on such old code. so please really consider to
>rebase it against mainline
I downloaded the last version of U-Boot and will do all my work regarding
DCache and MMU setup here.
>first you may start
On 15:36 Tue 31 Mar , Drasko DRASKOVIC wrote:
>On Tue, Mar 31, 2009 at 2:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>U-Boot 1.1.6 is quite old (more than 2 years old) please try to the
>current version
>I know, but that's the one we use... For now, everything works fine.
Ho
On Tue, Mar 31, 2009 at 2:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>but until we can take a look on the code it will be hard to known
And I just found :
./examples/test_burst_lib.S: *void mmu_init(void);
./examples/test_burst_lib.S:.global mmu_init
./examples/test_burst_lib.S:mmu_init
On Tue, Mar 31, 2009 at 2:21 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>U-Boot 1.1.6 is quite old (more than 2 years old) please try to the current
version
I know, but that's the one we use... For now, everything works fine.
>is your SOC in the Mainline?
>if you can tell us which one it's and if
On 14:20 Tue 31 Mar , Drasko DRASKOVIC wrote:
>>On Mon, Mar 30, 2009 at 10:31 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>before booting linux you must disable the cache which will be re-enable
>by
>>linux.
>OK. Is that done in bootm.c? I can see lines :
>/*
>
>On Mon, Mar 30, 2009 at 10:31 PM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>before booting linux you must disable the cache which will be re-enable by
>linux.
OK. Is that done in bootm.c? I can see lines :
/*
* We have reached the point of no return: we are going to
* overwrite all except
On 21:56 Mon 30 Mar , Drasko DRASKOVIC wrote:
> Hi all,
> I would like to eneble DCache in U-Boot, because peripheral register R/W and
> SDRAM R/W is extremely slow on my platform, so booting Linux image takes
> unexceptable long time. But apparently for ARM, MMU setup is needed first.
> Now, I
Hi all,
I would like to eneble DCache in U-Boot, because peripheral register R/W and
SDRAM R/W is extremely slow on my platform, so booting Linux image takes
unexceptable long time. But apparently for ARM, MMU setup is needed first.
Now, I did not find example on any presented ARM platforms include
14 matches
Mail list logo
