On 11/18/2017 08:11 PM, York Sun wrote:
> On 11/18/2017 02:24 AM, Marek Vasut wrote:
>> On 11/17/2017 10:48 PM, York Sun wrote:
>>> On 11/17/2017 12:59 PM, York Sun wrote:
On 11/17/2017 11:04 AM, Marek Vasut wrote:
> On 11/17/2017 08:02 PM, Marek Vasut wrote:
>> On 11/17/2017 05:43
On 11/18/2017 02:24 AM, Marek Vasut wrote:
> On 11/17/2017 10:48 PM, York Sun wrote:
>> On 11/17/2017 12:59 PM, York Sun wrote:
>>> On 11/17/2017 11:04 AM, Marek Vasut wrote:
On 11/17/2017 08:02 PM, Marek Vasut wrote:
> On 11/17/2017 05:43 PM, York Sun wrote:
>> On 09/12/2017 10:09
On 11/17/2017 10:48 PM, York Sun wrote:
> On 11/17/2017 12:59 PM, York Sun wrote:
>> On 11/17/2017 11:04 AM, Marek Vasut wrote:
>>> On 11/17/2017 08:02 PM, Marek Vasut wrote:
On 11/17/2017 05:43 PM, York Sun wrote:
> On 09/12/2017 10:09 AM, Marek Vasut wrote:
>> The status register is
On 11/17/2017 12:59 PM, York Sun wrote:
> On 11/17/2017 11:04 AM, Marek Vasut wrote:
>> On 11/17/2017 08:02 PM, Marek Vasut wrote:
>>> On 11/17/2017 05:43 PM, York Sun wrote:
On 09/12/2017 10:09 AM, Marek Vasut wrote:
> The status register is optional in the AMD command sets, but it's
On 11/17/2017 11:04 AM, Marek Vasut wrote:
> On 11/17/2017 08:02 PM, Marek Vasut wrote:
>> On 11/17/2017 05:43 PM, York Sun wrote:
>>> On 09/12/2017 10:09 AM, Marek Vasut wrote:
The status register is optional in the AMD command sets, but it's
presence can be checked by reading out CFI
On Nov 17, 2017, at 11:04, Marek Vasut
> wrote:
On 11/17/2017 08:02 PM, Marek Vasut wrote:
On 11/17/2017 05:43 PM, York Sun wrote:
On 09/12/2017 10:09 AM, Marek Vasut wrote:
The status register is optional in the AMD command sets, but it's
On 11/17/2017 08:02 PM, Marek Vasut wrote:
> On 11/17/2017 05:43 PM, York Sun wrote:
>> On 09/12/2017 10:09 AM, Marek Vasut wrote:
>>> The status register is optional in the AMD command sets, but it's
>>> presence can be checked by reading out CFI table entry 0xc bit 0.
>>> If the register is
On 11/17/2017 05:43 PM, York Sun wrote:
> On 09/12/2017 10:09 AM, Marek Vasut wrote:
>> The status register is optional in the AMD command sets, but it's
>> presence can be checked by reading out CFI table entry 0xc bit 0.
>> If the register is present, prefer using it's bit 7 to determine
>> if
On 09/12/2017 10:09 AM, Marek Vasut wrote:
> The status register is optional in the AMD command sets, but it's
> presence can be checked by reading out CFI table entry 0xc bit 0.
> If the register is present, prefer using it's bit 7 to determine
> if the flash is busy over reading the flash ; this
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