> The patch set dpll settings for 300MHz to values used by binary
> blob[1]. With new values dpll still generate 300MHz clock, but
> EMAC work. Probably with new values dpll generate more stable clock.
>
> dpll on rk3188 provide clocks to DDR and EMAC. With current
> dpll settings EMAC doesn't
> The patch set dpll settings for 300MHz to values used by binary
> blob[1]. With new values dpll still generate 300MHz clock, but
> EMAC work. Probably with new values dpll generate more stable clock.
>
> dpll on rk3188 provide clocks to DDR and EMAC. With current
> dpll settings EMAC doesn't
> The patch set dpll settings for 300MHz to values used by binary
> blob[1]. With new values dpll still generate 300MHz clock, but
> EMAC work. Probably with new values dpll generate more stable clock.
>
> dpll on rk3188 provide clocks to DDR and EMAC. With current
> dpll settings EMAC doesn't
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