Hi,
On 09.02.2022 08:51, Jorge Ramirez-Ortiz, Foundries wrote:
I have also shared with the community a patch, on top of your changes,
adding encrypted bitfile support in u-boot.
awesome. btw how is the bitstream decrypted? I didnt look into that, I
suppose there is probably a doc somewhere?
On 07/02/22, Adrian Fiergolski wrote:
> Hi Jorge and Oleksandr,
>
> Thank you for sharing all the links. I found there a lot of inspiration to
> meet my target of using encrypted bitfiles.
thanks Adrian. Glad to hear that
>
> I have also shared with the community a patch, on top of your
Hi Jorge and Oleksandr,
Thank you for sharing all the links. I found there a lot of inspiration
to meet my target of using encrypted bitfiles.
I have also shared with the community a patch, on top of your changes,
adding encrypted bitfile support in u-boot.
Regards,
Adrian
On 19.01.2022
Hi Adrian,
On Wed, Jan 19, 2022 at 7:23 PM Jorge Ramirez-Ortiz, Foundries
wrote:
>
> On 19/01/22, Jorge Ramirez-Ortiz, Foundries wrote:
> > On 19/01/22, Jorge Ramirez-Ortiz, Foundries wrote:
> > > On 19/01/22, Adrian Fiergolski wrote:
> > > > Hi Jorge,
> > >
> > > hi Adrian,
> > >
> > > >
> > >
On 19/01/22, Jorge Ramirez-Ortiz, Foundries wrote:
> On 19/01/22, Jorge Ramirez-Ortiz, Foundries wrote:
> > On 19/01/22, Adrian Fiergolski wrote:
> > > Hi Jorge,
> >
> > hi Adrian,
> >
> > >
> > > Have you succeeded to enable secure boot on ZynqMP with SPL (not Xilinx's
> > > FSBL)? Is it
On 19/01/22, Jorge Ramirez-Ortiz, Foundries wrote:
> On 19/01/22, Adrian Fiergolski wrote:
> > Hi Jorge,
>
> hi Adrian,
>
> >
> > Have you succeeded to enable secure boot on ZynqMP with SPL (not Xilinx's
> > FSBL)? Is it documented somewhere? Any configuration files/yocto recipes?
>
>
On 19/01/22, Adrian Fiergolski wrote:
> Hi Jorge,
hi Adrian,
>
> Have you succeeded to enable secure boot on ZynqMP with SPL (not Xilinx's
> FSBL)? Is it documented somewhere? Any configuration files/yocto recipes?
somewhere there:
https://github.com/foundriesio/meta-lmp
> Have you managed to
Hi Jorge,
Have you succeeded to enable secure boot on ZynqMP with SPL (not
Xilinx's FSBL)? Is it documented somewhere? Any configuration
files/yocto recipes? Have you managed to resolve problem of the
bitstream loaded in such a case by SPL?
I need to use an encrypted bitstream. However, it
Hi,
On 10/5/21 8:08 AM, Jorge Ramirez-Ortiz, Foundries wrote:
> On 05/10/21, Jorge Ramirez-Ortiz, Foundries wrote:
>> On 04/10/21, Alex G. wrote:
>>> On 10/4/21 3:32 PM, Jorge Ramirez-Ortiz, Foundries wrote:
Hello,
>>
>> hi Alex,
>>
We are enabling secure boot on Zynqmp with SPL.
On 05/10/21, Jorge Ramirez-Ortiz, Foundries wrote:
> On 04/10/21, Alex G. wrote:
> > On 10/4/21 3:32 PM, Jorge Ramirez-Ortiz, Foundries wrote:
> > > Hello,
> > >
>
> hi Alex,
>
> > > We are enabling secure boot on Zynqmp with SPL.
> > >
> > > The issue however is that during secure boot, the
On 04/10/21, Alex G. wrote:
> On 10/4/21 3:32 PM, Jorge Ramirez-Ortiz, Foundries wrote:
> > Hello,
> >
hi Alex,
> > We are enabling secure boot on Zynqmp with SPL.
> >
> > The issue however is that during secure boot, the bootrom not only
> > validates the first loader (SPL and PMUFW combo) but
On 10/4/21 3:32 PM, Jorge Ramirez-Ortiz, Foundries wrote:
Hello,
We are enabling secure boot on Zynqmp with SPL.
The issue however is that during secure boot, the bootrom not only
validates the first loader (SPL and PMUFW combo) but it will also
expect a signed bitstream during load(FPGA).
Hello,
We are enabling secure boot on Zynqmp with SPL.
The issue however is that during secure boot, the bootrom not only
validates the first loader (SPL and PMUFW combo) but it will also
expect a signed bitstream during load(FPGA).
Since currently the SPL load of an FPGA image from FIT does
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