> -----Original Message----- > From: Marek Vasut <ma...@denx.de> > Sent: Tuesday, 14 September, 2021 11:26 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut <ma...@denx.de>; Lim, Elly Siew Chin > <elly.siew.chin....@intel.com>; Simon Goldschmidt > <simon.k.r.goldschm...@gmail.com>; Chee, Tien Fong > <tien.fong.c...@intel.com> > Subject: [PATCH 4/8] arm: socfpga: vining: Set default SPI NOR mode and > frequency > > The SPI NOR bus mode is 0 on this system, update it accordingly. > Increase frequency to 40 MHz and enable SFDP parsing, since the flashes on > this system support that and it is a huge performance improvement. > > Signed-off-by: Marek Vasut <ma...@denx.de> > Cc: Siew Chin Lim <elly.siew.chin....@intel.com> > Cc: Simon Goldschmidt <simon.k.r.goldschm...@gmail.com> > Cc: Tien Fong Chee <tien.fong.c...@intel.com> > --- > configs/socfpga_vining_fpga_defconfig | 3 +++ > 1 file changed, 3 insertions(+) >
Reviewed-by: Tien Fong Chee <tien.fong.c...@intel.com> Regards, TF