Hi Fabio
On Tue, Sep 27, 2022 at 3:44 PM Fabio Estevam wrote:
>
> Hi Michael,
>
> On Tue, Sep 27, 2022 at 10:38 AM Michael Nazzareno Trimarchi
> wrote:
>
> > When Dario wrote the Ti clock, he was using the dtsi. One idea can be
> > understand if this approch
> > cost less in term of space in
Hi Michael,
On Tue, Sep 27, 2022 at 10:38 AM Michael Nazzareno Trimarchi
wrote:
> When Dario wrote the Ti clock, he was using the dtsi. One idea can be
> understand if this approch
> cost less in term of space in the SPL
Care to submit a patch series with your proposal?
Hi Fabio
On Tue, Sep 27, 2022 at 2:29 PM Fabio Estevam wrote:
>
> Hi Michael,
>
> On 27/09/2022 09:24, Michael Nazzareno Trimarchi wrote:
>
> >> Fabio Estevam (4):
> >> clk-imx8mm: Only build PWM clocks in non-SPL code
> >> clk-imx8mm: Move CLK_ENET_AXI to the non-SPL section
> >
> > I'm not
Hi Michael,
On 27/09/2022 09:24, Michael Nazzareno Trimarchi wrote:
Fabio Estevam (4):
clk-imx8mm: Only build PWM clocks in non-SPL code
clk-imx8mm: Move CLK_ENET_AXI to the non-SPL section
I'm not really convinced of those two. I mean with should maybe think
about
some different
Hi Fabio
On Mon, Sep 26, 2022 at 6:40 PM Fabio Estevam wrote:
>
> Reduce the SPL binary size by building some clocks only for the
> non-SPL case, such as Ethernet and PWM and by also building ECSPI
> and QSPI when their respective drivers are enabled.
>
> On a imx8mm_evk_defconfig the following
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